MPC8541EPXAQF Freescale Semiconductor, MPC8541EPXAQF Datasheet - Page 27

• Manufacturer Part Number: MPC8541EPXAQF
• Description: IC MPU POWERQUICC III 783-FCPBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC IIIr

Specifications of MPC8541EPXAQF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.0GHz
• Voltage: 1.3V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 1GHz
• Embedded Interface Type: I2C, SPI, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Rohs Compliant: No
• For Use With: MPC8548CDS - DEV TOOLS CDS FOR 8548CWH-PPC-8540N-VE - KIT EVAL SYSTEM MPC8540
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

8.2.4
This section describes the TBI transmit and receive AC timing specifications.
8.2.4.1
Table 24
Figure 12
Freescale Semiconductor
At recommended operating conditions with LV
GTX_CLK clock period
GTX_CLK duty cycle
GMII data TCG[9:0], TX_ER, TX_EN setup time
GTX_CLK going high
GMII data TCG[9:0], TX_ER, TX_EN hold time from
GTX_CLK going high
GTX_CLK clock rise and fall time
Notes:
1. The symbols used for timing specifications herein follow the pattern of t
2. Signal timings are measured at 0.7 V and 1.9 V voltage levels.
3. Guaranteed by design.
)(reference)(state)
symbolizes the TBI transmit timing (TT) with respect to the time from t
signals (D) reach the valid state (V) or setup time. Also, t
time from t
general, the clock reference symbol representation is based on three letters representing the clock of a particular
functional. For example, the subscript of t
convention is used with the appropriate letter: R (rise) or F (fall).
MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2
provides the MII transmit AC timing specifications.
shows the TBI transmit AC timing diagram.
TBI AC Timing Specifications
TTX
TBI Transmit AC Timing Specifications
Parameter/Condition
GTX_CLK
(K) going high (H) until the referenced data signals (D) reach the invalid state (X) or hold time. Note that, in
for inputs and t
TCG[9:0]
(first two letters of functional block)(reference)(state)(signal)(state)
Table 24. TBI Transmit AC Timing Specifications
Figure 12. TBI Transmit AC Timing Diagram
t
TTXH
DD
t
TTKHDV
t
TTXF
of 3.3 V ± 5%.
TTX
t
TTX
represents the TBI (T) transmit (TX) clock. For rise and fall times, the latter
TTKHDX
t
TTXR
Symbol
t
TTXH
t
t
TTKHDV
TTKHDX
t
, t
t
TTX
TTXF
TTXF
symbolizes the TBI transmit timing (TT) with respect to the
/t
TTX
1
2,3
TTX
(first two letters of functional block)(signal)(state
t
TTKHDX
(K) going high (H) until the referenced data
t
TTXR
Min
2.0
1.0
40
—
—
for outputs. For example, t
Ethernet: Three-Speed, MII Management
t
TTXR
Typ
8.0
—
—
—
—
Max
1.0
60
—
—
—
TTKHDV
Unit
ns
ns
ns
ns
%
27