MPC8572EPXAVND Freescale Semiconductor, MPC8572EPXAVND Datasheet - Page 31

• Manufacturer Part Number: MPC8572EPXAVND
• Description: MPU POWERQUICC III 1023-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8572EPXAVND

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.5GHz
• Voltage: 1.1V
• Mounting Type: Surface Mount
• Package / Case: 1023-FCPBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Figure 7
Freescale Semiconductor
At recommended operating conditions with LV
At recommended operating conditions with LV
RX_CLK clock period
RX_CLK duty cycle
RX_CLK peak-to-peak jitter
Rise time RX_CLK (20%–80%)
Fall time RX_CLK (80%–20%)
RXD[7:0], RX_DV, RX_ER setup time to RX_CLK
RXD[7:0], RX_DV, RX_ER hold time to RX_CLK
1. The minimum cycle period (or maximum frequency) of the RX_CLK is dependent on the maximum platform frequency of the
Rise time TX_CLK (20%–80%)
Fall time TX_CLK (80%–20%)
FIFO data TXD[7:0], TX_ER, TX_EN setup time to GTX_CLK
GTX_CLK to FIFO data TXD[7:0], TX_ER, TX_EN hold time
Notes:
1. The minimum cycle period (or maximum frequency) of the TX_CLK is dependent on the maximum platform frequency of the
speed bins the part belongs to as well as the FIFO mode under operation. Refer to
Restrictions,” for more detailed description.
speed bins the part belongs to as well as the FIFO mode under operation. Refer to
Restrictions,” for more detailed description.
and
GTX_CLK
TXD[7:0]
TX_EN
TX_ER
Figure 8
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Parameter/Condition
Parameter/Condition
1
Table 25. FIFO Mode Transmit AC Timing Specification (continued)
show the FIFO timing diagrams.
Table 26. FIFO Mode Receive AC Timing Specification
t
FITH
Figure 7. FIFO Transmit AC Timing Diagram
DD
DD
/TV
/TV
t
FIT
DD
DD
of 2.5V ± 5%
of 2.5V ± 5%
t
FITDV
t
Symbol
Symbol
FIRH
t
t
t
t
t
FITDV
FITDX
t
t
t
FIRDV
FIRDX
t
FITR
FITF
t
FIRR
FIRF
FIRJ
FIR
/t
FIR
t
FITDX
Ethernet: Enhanced Three-Speed Ethernet (eTSEC)
t
FITF
Min
Min
2.0
0.5
5.3
1.5
0.5
—
—
45
—
—
—
Section 4.5, “Platform to eTSEC FIFO
Section 4.5, “Platform to eTSEC FIFO
Typ
Typ
8.0
—
—
—
—
50
—
—
—
—
—
t
FITR
Max
0.75
0.75
Max
0.75
0.75
100
250
3.0
—
55
—
—
Unit
Unit
ns
ns
ns
ns
ns
ps
ns
ns
ns
ns
%
31