TS68040VR25A Atmel, TS68040VR25A Datasheet - Page 33

• Manufacturer Part Number: TS68040VR25A
• Description: IC MPU 32BIT 25MHZ 179PGA
• Manufacturer: Atmel

Specifications of TS68040VR25A

• Processor Type: 68000 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 179-PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Table 19. Addressing Modes
Note:
2116A–HIREL–09/02
Addressing Modes
Register Direct
Register Indirect
Register Indirect With Index
Memory Indirect
Program Counter Indirect With Displacement
Program Counter Indirect With Index
Program Counter Memory Indirect
Absolute
Immediate
Date Register Direct
Address Register Direct
Address Register Indirect
Address Register Indirect With Postincrement
Address Register Indirect With Predecrement
Address Register Indirect With Displacement
Address Register Indirect With Index (8-bit Displacement)
Address Register Indirect With Index (Base Displacement)
Memory Indirect Postincrement
Memory Indirect Preindexed
PC Indirect With Index (8-bit Displacement)
PC Indirect With Index (Base Displacement
PC Memory Indirect Postindexed
PC Memory Indirect Preindexed
Absolute Short
Absolute Long
d
(data) =
8
, d
DN =
AN =
Xn =
bd =
od =
PC =
( ) =
[ ] =
16
=
Data register, D0-D7
Address register, A0-A7
A twos-complement or sign-extended displacement; added as part of the effective address calculation;
size is 8 (d
Address or data register used as an index register; form is Xn, SIZE*SCALE, where SIZE is W or L
(indicates index register size) and SCALE is 1, 2, 4 or 8 (index register os multiplied by SCALE); use of
SIZE and or SCALE is optional.
A twos-complement base displacement; when present, size can be 16 or 32 bits.
Outer displacement added as part of effective address calculation after any memory indirection; use is
optional with a size of 16 or 32 bits.
Program counter.
Immediate value of 8, 16 or 32 bits.
Effective address.
Used as indirect address to long-word address.
8
) or 16 (d
–
16
) bits; when omitted, assemblers use a value of zero.
Instruction Set Overview
Dn
An
(An)
(An)
(An)
(d
(d
(bd, An, Xn)
([bd, An], Xn, od)
([bd, An, Xn], od)
(d
(bd, PC, Xn)
([bd, PC], Xn, od)
([bd, PC, Xn], od)
xxx.W
xxx.L
Syntax
(d
# (data)
16
8
8
16
, An, Xn)
, PC, Xn)
, An)
, PC)
TS68040
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