MC68306FC16B Freescale Semiconductor, MC68306FC16B Datasheet - Page 63

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MC68306FC16B

Manufacturer Part Number
MC68306FC16B
Description
IC MPU INTEGRATED 132-PQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68306FC16B

Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC68306FC16B
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68306FC16B
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
In the asynchronous mode, the accessed device operates independently of the frequency
and phase of the system clock. For example, the MC68681 dual universal asynchronous
receiver/transmitter (DUART) does not require any clock-related information from the bus
master during a bus transfer. Asynchronous devices are designed to operate correctly
with processors at any clock frequency when relevant timing requirements are observed.
A device can use a clock at the same frequency as the system clock (e.g., 8, 10, or 12.5
MHz), but without a defined phase relationship to the system clock. This mode of
operation is pseudo-asynchronous; it increases performance by observing timing
parameters related to the system clock frequency without being completely synchronous
with that clock. A memory array designed to operate with a particular frequency processor
but not driven by the processor clock is a common example of a pseudo-asynchronous
device.
The designer of a fully asynchronous system can make no assumptions about address
setup time, which could be used to improve performance. With the system clock frequency
known, the slave device can be designed to decode the address bus before recognizing
an address strobe. Parameter #11 (refer to AC Electrical Specifications—Read and
Write Cycles) specifies the minimum time before address strobe during which the
address is valid.
MOTOROLA
UDS/LDS
UDS/LDS
DTACK
ADDR
DTACK
DATA
ADDR
DATA
R/W
R/W
AS
AS
Figure 3-29. Fully Asynchronous Write Cycle
Figure 3-28 Fully Asynchronous Read Cycle
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68306 USER'S MANUAL
Go to: www.freescale.com
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