MC68306FC16B Freescale Semiconductor, MC68306FC16B Datasheet - Page 98

• Manufacturer Part Number: MC68306FC16B
• Description: IC MPU INTEGRATED 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68306FC16B

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

5.2.5.3 PORT DATA REGISTER. The port data register bits return the value as written,
regardless of the direction register and pin state. For pins configured as outputs, the
corresponding value in the port data register is driven externally.
FFFFFFF0/1
PAD7–0—Port A Data Bit 7 through 0.
PBD7–0—Port B Data Bit 7 through 0.
5.2.6 Chip Selects
The chip-select outputs are all active-low decodes of the high fifteen internal address bits
(A31–A17), the three function code bits, and the read/write cycle type. The active duration
of any chip select is the period of the address strobe low and either a data strobe or
read/write low. Thus there are separate chip select pulses for the read and write portions
of a read-modify-write cycle.
The four mask bits (CSM3–CSM0) are decoded to an n-of-15 mask, where n is the binary
value of CSM3–CSM0. On every bus cycle, the n most significant address bits of the
range A31–A17 are compared, and the remaining less significant bits are ignored.
The fifteen address bits are first masked by each chip select mask, then compared with
each chip select base address (CSA31–CSA17). All CSAx bits not used in the comparison
must be zero. The function code is matched with the CSFC qualifiers, and the cycle type
is matched with the CSR/CSW qualifiers. If all three qualifiers are successful for any chip
select, the cycle is a hit.
If the cycle hits multiple chip selects, the lowest numbered chip select has priority. All chip
selects have priority over DRAM. After reset, CS0 responds to the entire 4 Gbyte address
space, except for the range dedicated to internal resources, i.e., CS0 responds to
00000000–FFFFEFFF. The other chip selects are not affected by any reset, and must be
explicitly programmed. This applies to all chip selects, whether used or not.
5-8
RESE
PAD7
15
T:
U
This bit determines the direction of data flow at port B pins 7–0.
0 = Input.
1 = Output.
PAD6
14
U
PAD5
13
U
PAD4
12
U
PAD3
11
U
Freescale Semiconductor, Inc.
For More Information On This Product,
PAD2
10
U
MC68306 USER'S MANUAL
PAD1
Go to: www.freescale.com
9
U
PAD0
8
U
PBD7
7
U
PBD6
U
6
PBD5
5
U
PBD4
4
U
PBD3
3
U
PBD2
2
U
SUPERVISOR ONLY
MOTOROLA
PBD1
U
1
PBD0
U
0