MPC852TVR100 Freescale Semiconductor, MPC852TVR100 Datasheet - Page 39

IC MPU POWERQUICC 100MHZ 256PBGA

MPC852TVR100

Manufacturer Part Number
MPC852TVR100
Description
IC MPU POWERQUICC 100MHZ 256PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC852TVR100

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
100MHz
Voltage
1.8V
Mounting Type
Surface Mount
Package / Case
256-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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0
Table 14
Freescale Semiconductor
Num
J82
J83
J84 RSTCONF pulse width (MIN = 17.00 x B1)
J85 —
J86
J87
J88
J89
J90
J91
J92
J93 DSDI, DSCK set up (MIN = 3.00 x B1)
J94 DSDI, DSCK hold time (MIN = 0.00 x B1 + 0.00)
J95
CLKOUT to HRESET high impedance (MAX =
0.00 x B1 + 20.00)
CLKOUT to SRESET high impedance (MAX =
0.00 x B1 + 20.00)
Configuration data to HRESET rising edge set
up time (MIN = 15.00 x B1 + 50.00)
Configuration data to RSTCONF rising edge set
up time (MIN = 0.00 x B1 + 350.00)
Configuration data hold time after RSTCONF
negation (MIN = 0.00 x B1 + 0.00)
Configuration data hold time after HRESET
negation (MIN = 0.00 x B1 + 0.00)
HRESET and RSTCONF asserted to data out
drive (MAX = 0.00 x B1 + 25.00)
RSTCONF negated to data out high impedance.
(MAX = 0.00 x B1 + 25.00)
CLKOUT of last rising edge before chip
three-states HRESET to data out high
impedance. (MAX = 0.00 x B1 + 25.00)
SRESET negated to CLKOUT rising edge for
DSDI and DSCK sample (MIN = 8.00 x B1)
shows the reset timing for the MPC852T.
Characteristic
MPC852T Hardware Specifications, Rev. 3.1
Table 14. Reset Timing
515.20
504.50
350.00
242.40
90.90
0.00
0.00
0.00
Min
33 MHz
20.00
20.00
25.00
25.00
25.00
Max
425.00
425.00
350.00
200.00
75.00
0.00
0.00
0.00
Min
40 MHz
20.00
20.00
25.00
25.00
25.00
Max
340.00
350.00
350.00
160.00
60.00
0.00
0.00
0.00
Min
50 MHz
20.00
20.00
25.00
25.00
25.00
Max
257.60
277.30
350.00
121.20
45.50
0.00
0.00
0.00
Min
Bus Signal Timing
66 MHz
20.00
20.00
25.00
25.00
25.00
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
39

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