UDA1380HN/N2,118 NXP Semiconductors, UDA1380HN/N2,118 Datasheet - Page 34

• Manufacturer Part Number: UDA1380HN/N2,118
• Description: IC AUDIO CODEC MINIDISC 32HVQFN
• Manufacturer: NXP Semiconductors
• Type: Stereo Audior

Specifications of UDA1380HN/N2,118

• Package / Case: 32-VFQFN Exposed Pad
• Data Interface: I²C, Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 97 / 100
• Voltage - Supply, Analog: 2.4 V ~ 3.6 V
• Voltage - Supply, Digital: 2.4 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Interface Type: Serial (I2C)
• Resolution: 24 bit
• Operating Supply Voltage: 3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Current: 10 mA
• Thd Plus Noise: - 85 dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935271001118; UDA1380HN-T; UDA1380HN-T

NXP Semiconductors
2004 Apr 22
Stereo audio coder-decoder
for MD, CD and MP3
BIT
8
7
6
5
4
3
2
1
0
PON_PGAR
PON_ADCR
PON_PGAL
PON_ADCL
PON_BIAS
PON_AVC
PON_LNA
SYMBOL
EN_AVC
−
Power-on BIAS. A 1-bit value to set the power control setting of the ADC,
AVC and FSDAC. When this bit is logic 0: ADC, AVC and FSDAC bias circuits
are powered-off; when this bit is logic 1: Power-on bias for ADC, AVC and
FSDAC. Default value 0.
Enable control AVC. A 1-bit value to enable or disable the analog mixer.
When this bit is logic 0: analog mixer is disabled; when this bit is logic 1:
analog mixer is enabled. Default value 0.
Power-on AVC. A 1-bit value to have power-on control for the analog mixer.
When this bit is logic 0: analog mixer powered-off; when this bit is logic 1:
analog mixer powered-on. Default value 0.
default value 0
Power-on LNA. A 1-bit value to power-on the LNA and SDC. When this bit is
logic 0: LNA and SDC are powered-off; when this bit is logic 1: LNA and SDC
are powered-on. Default value 0.
Power-on PGAL. A 1-bit value to have power-on control for the PGA left.
When this bit is logic 0: left PGA is powered-off; when this bit is logic 1: left
PGA is powered-on. Default value 0.
Power-on ADCL. A 1-bit value to have power-on control for the ADC left.
When this bit is logic 0: left ADC is powered-off; when this bit is logic 1: left
ADC is powered-on. Default value 0.
Power-on PGAR. A 1-bit value to have power-on control for the PGA right.
When this bit is logic 0: right PGA is powered-off; when this bit is logic 1: right
PGA is powered-on. Default value 0.
Power-on ADCR. A 1-bit value to have power-on control for the ADC right.
When this bit is logic 0: right ADC is powered-off; when this bit is logic 1: right
ADC is powered-on. Default value 0.
34
DESCRIPTION
Product specification
UDA1380