CS42325-CQZ Cirrus Logic Inc, CS42325-CQZ Datasheet - Page 56

• Manufacturer Part Number: CS42325-CQZ
• Description: IC CODEC STEREO AUDIO 48-LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS42325-CQZ

• Package / Case: 48-LQFP
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 1 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 95 / 100
• Voltage - Supply, Analog: 3.13 V ~ 3.47 V
• Voltage - Supply, Digital: 3.13 V ~ 3.47 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 1
• Number Of Dac Outputs: 2
• Conversion Rate: 96 KSPS
• Interface Type: Serial (I2C, SPI)
• Resolution: 24 bit
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Channels: 1 ADC/2 DAC
• Supply Current: 10 mA to 24 mA
• Thd Plus Noise: - 88 dB ADC / - 90 dB DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

56
6.11.5
6.11.6
6.11.7
6.12
6.12.1 External Mute Control Pin
6.12.2 AOUT1 Select
Reserved
7
AOUT1 Control (Address 0Dh)
DAC2 Loop-Back
Loops ADC SDOUT, SCLK, and LRCK to DAC1 serial port pins.
DAC2 Invert Signal Polarity
When enabled, this bit will effect a 180 degree phase shift in the DAC2 channels.
DAC2 Channel Mixer
These bits implements mono mixes of the left and right channels as well as a left/right channel swap.
This bit controls the logic state of the corresponding MUTEC1 pin. Though this bit is active high, it should
be noted that the MUTEC1 pin is active low.
These bits are used to select the analog output source.
0
1
0
1
0
1
000
001
010
011
100
101
110
111
DAC2_LOOP_
AOUT1_SEL[2:0]
DAC2_MIX[1:0]
DAC2_INV
MUTEC1
BACK
Reserved
00
01
10
11
6
Off
On
Off
On
High (Mute Disengaged)
Low (Mute Engaged)
Reserved
AIN Pair 1
AIN Pair 2
AIN Pair 3
AIN Pair 4
AIN Pair 5
DAC1 Output Pair
DAC2 Output Pair
Reserved
5
DAC2 OUTA
Reserved
L
---------- -
+
2
R
L
4
R
DAC2 Invert Signal Polarity
Output on MUTEC1 pin
MUTEC1
DAC2 Loop-Back
3
AOUT1 Source
AOUT1_SEL2 AOUT1_SEL1 AOUT1_SEL0
2
DAC2 OUTB
L
---------- -
+
R
2
L
1
R
CS42325
DS838A2
0