IDTSTAC9753AXNAED1XR IDT, Integrated Device Technology Inc, IDTSTAC9753AXNAED1XR Datasheet - Page 41

• Manufacturer Part Number: IDTSTAC9753AXNAED1XR
• Description: IC CODEC AC'97 MIC/JACK 32-QFN
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Audio Codec '97r

Specifications of IDTSTAC9753AXNAED1XR

• Resolution (bits): 20 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• S/n Ratio, Adcs / Dacs (db) Typ: 85 / 92
• Voltage - Supply, Analog: 3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-QFN
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 3.135V
• Single Supply Voltage (max): 3.465/5.25V
• Package Type: VFQFPN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: STAC9753AXNAED1XR

IDT™
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
STAC9752A/9753A
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
5.4.3.
5.4.4.
5.4.5.
5.4.6.
5.4.7.
SLOTREQ bits are always 0 in the following cases
•
•
SLOTREQ bits are only set to 1 by the CODEC in the following case
•
Slot 2: Status Data Port
The status data port delivers 16-bit control register read data.
If Slot 2 is tagged invalid by AC‘97, then the entire slot will be stuffed with 0s by AC‘97.
Slot 3: PCM Record Left Channel
Audio input frame slot 3 is the left channel output of STAC9752A/9753A input MUX, post-ADC.
STAC9752A/9753A ADCs are implemented to support 20-bit resolution.
NOTE: The ADC can be assigned to slots 3&4, 6&9, 7&8, or 10&11.
Slot 4: PCM Record Right Channel
Audio input frame slot 4 is the right channel output of STAC9752A/9753A input MUX, post-ADC.
STAC9752A/9753A ADCs are implemented to support 20-bit resolution.
NOTE: The ADC can be assigned to slots 3&4, 6&9, 7&8, or 10&11.
Slot 5: NOT USED (Modem Line 1 ADC)
Audio input frame slot 5 is not used by the STAC9752A/9753A and is always stuffed with 0s.
Slot 6-9: ADC
The left and right ADC channels of the STAC9752A/9753A may be assigned to slots 6&9 by Regis-
ter 6Eh.
NOTE: The ADC can be assigned to slots 3&4, 6&9, 7&8, or 10&11.
19:4
Bit
3:0
Fixed rate mode (VRA = 0)
Inactive (powered down) ADC channel
Variable rate audio mode (VRA = 1) AND active (power ready) ADC AND a non-48KHz ADC
sample rate and CODEC does not need a sample
Control Register Read Data
Description
Reserved
Table 10. Status Data Port Bit Assignments
41
Stuffed with 0s if tagged "invalid"
STAC9752A/9753A
Stuffed with 0s
Comments
PC AUDIO
V 1.5 1206