IDTSTAC9758XXTAEB1XR IDT, Integrated Device Technology Inc, IDTSTAC9758XXTAEB1XR Datasheet
IDTSTAC9758XXTAEB1XR
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HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ OVERVIEW High performance, 6-channel, AC’97 2.3 CODECs with high Signal-to-Noise ratio and low distortion. FEATURES • High performance technology • 6-Channel AC’97 2.3 CODECs • 20-bit full duplex stereo ADCs • 20-bit ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ TABLE OF CONTENTS 1. DESCRIPTION ........................................................................................................................... 7 1.1. Features ........................................................................................................................................... 8 1.2. Block Diagram ................................................................................................................................... 9 2. CHARACTERISTICS/SPECIFICATIONS ................................................................................10 2.1. Electrical Specifications ................................................................................................................... 10 2.1.1. Absolute Maximum Ratings ............................................................................................... 10 2.1.2. ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 5.4.2. Slot 2: Status Data Port ..................................................................................................... 40 5.4.3. Slot 3: PCM Record Left Channel ..................................................................................... 41 5.4.4. Slot 4: PCM Record Right Channel ................................................................................... 41 5.4.5. Slot 5: Modem Line ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.4.4. Extended Modem Status and Control Register (3Eh) ........................................................82 8.4.5. GPIO Pin Configuration Register (4Ch) ............................................................................. 82 8.4.6. GPIO Pin Polarity/Type Register (4Eh) ............................................................................. 83 8.4.7. GPIO Pin Sticky Register (50h) ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 16. APPENDIX A: PROGRAMMING REGISTERS ................................................................... 116 17. REVISION HISTORY ........................................................................................................... 118 LIST OF FIGURES Figure 1. Cold Reset Timing .......................................................................................................................... 17 Figure 2. Warm Reset Timing ........................................................................................................................17 Figure 3. Clocks ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ LIST OF TABLES Table 1. Clock Mode Configuration ............................................................................................................... 19 Table 2. Common Clocks and Sources ......................................................................................................... 19 Table 3. Recommended CODEC ID strapping .............................................................................................. 28 Table 4. AC-Link Output Slots ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 1. DESCRIPTION IDT's STAC9758/9759 are general purpose 20-bit, full duplex, 6-Channel audio CODECs conform- ing to the analog component specification of AC '97 (Audio Codec 97 Component Specification Rev. 2.3). The ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 1.1. Features • Six Channel, AC’97 Revision 2.3 Compliant • 20-bit ADCs • 20-bit DACs • 96KHz Sample Rate support • SPDIF OUTPUT at 32 KHz, 44.1KHz, and 48KHz • Double ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ • GPIO depending upon configuration • Power Management • IDT SS3D • Primary and Secondary Mode Operation • High performance Sigma-Delta technology • Digital and Analog PC Beep ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 2. CHARACTERISTICS/SPECIFICATIONS 2.1. Electrical Specifications 2.1.1. Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the STAC9758/9759. These ratings, which are standard values for IDT commercially ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 2.1.3. Power Consumption Digital Supply Current + 3.3 V Digital Analog Supply Current (at Reset state Analog + 3.3 V Analog Power Down Status (individually asserted) All paths ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 2.1.4. AC-Link Static Digital Specifications ( ºC, DVdd = 3.3V ± 5%, AVss=DVss = 0V) ambient Input Voltage Range Low level input range High level input voltage High level ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Analog Frequency Response (Note 3) Total Harmonic Distortion + Noise (-3dB): (Note LINE_OUT LINE / AUX / VIDEO to LINE_OUT PCM (DAC) to LINE_OUT (full scale) PCM (DAC) ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ LINE_OUT/MONO_OUT Load Resistance LINE_OUT/MONO_OUT Load Capacitance HEADPHONE_OUT Load Resistance HEADPHONE_OUT Load Capacitance Mute Attenuation PLL lock time PLL 24.576MHz clock jitter PLL frequency multiplication tolerance PLL bit clock jitter Note: 1. ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ LINE_IN to HEADPHONE_OUT Analog Frequency Response (Note 3) Total Harmonic Distortion + Noise (-3dB): (Note LINE_OUT LINE / AUX / VIDEO to LINE_OUT PCM (DAC) to LINE_OUT (full ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Deviation from Linear Phase LINE_OUT/MONO_OUT Load Resistance LINE_OUT/MONO_OUT Load Capacitance HEADPHONE_OUT Load Resistance HEADPHONE_OUT Load Capacitance Mute Attenuation PLL lock time PLL 24.576MHz clock jitter PLL frequency multiplication tolerance Note: 1. ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 2.2. AC Timing Characteristics ( °C, AVdd = 3. ± 5%, DVdd = 3.3V ± 5%, AVss=DVss=0V; 50pF external load) ambient 2.2.1. Cold Reset ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 2.2.3. Clocks BIT_CLK frequency BIT_CLK period BIT_CLK output jitter BLT_CLK high pulse width (Note Note:) BIT_CLK low pulse width (Note ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 2.2.4. STAC9758/9759 Crystal Elimination Circuit and Clock Frequencies The STAC9758/9759 supports several clock frequency inputs as described in the following table. In general, when a 24.576MHz crystal is not used, the ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 2.2.5. Data Setup and Hold (50 pF external load) BIT_CLK SDATA_OUT SDATA_IN SYNC Setup to falling edge of BIT_CLK Hold from falling edge of BIT_CLK Note: Setup and hold time parameters ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 2.2.7. AC-Link Low Power Mode Timing End of Slot 2 to BIT_CLK, SDATA_IN low 2.2.8. ATE Test Mode Setup to trailing edge of RESET# (also applies to SYNC) Rising edge of ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 3. TYPICAL CONNECTION DIAGRAM 3. ± 5% 0.1 µ ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 3.1. Split Independent Power Supply Operation In PC applications, one power supply input to the STAC9758/9759 may be derived from a supply regulator and the other directly from the PCI power ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 0.1 µF 1 µ PC_BEEP 1 3 PHONE 1 4 AUX_L 1 5 AUX_R 1 6 MIC2_L 1 7 MIC2_R 1 8 CD_L 1 9 CD_GND 2 0 CD_R ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ CONTROLLER, CODEC AND AC-LINK 4. This section describes the physical and high-level functional aspects of the AC‘97 Controller to CODEC interface, referred to as AC-Link. 4.1. AC-Link Physical interface The STAC9758/9759 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ The STAC9758/9759 uses the XTAL_OUT Pin (Pin 3) and the CID0 and CID1 pins (Pins 45 & 46) to determine its alternate clock frequencies. See section 2.2.4: page19 for additional information ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ yields a 48 KHz SYNC signal whose period defines an audio frame. Data is transitioned on AC-Link on every rising edge of BIT_CLK, and subsequently sampled by the receiving device on ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 4.3.3. CODEC ID Strapping Audio CODECs in the 48-pin package use pins 45 and 46 (defined as ID0# and ID1#) as strapping (i.e. configuration) pins to configure the CODEC ID. The ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 4.6. AC-Link Power Management 4.6.1. Powering down the AC-Link The AC-Link signals can be placed in a low power mode. When AC‘97’s Powerdown Register (26h) is programmed to the appropriate value, ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 4.6.2.2. The STAC9758/9759 (running off Vaux) can trigger a wake event (PME#) by transitioning SDATA_IN from low to high and holding it high until either a warm or cold reset is ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 5. AC-LINK DIGITAL INTERFACE 5.1. Overview AC-Link is the 5 pin digital serial interface that links AC‘97 CODEC to Controller. The AC-Link proto- col is a bi-directional, fixed clock rate, serial ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Slot Slot 0 SDATA_IN TAG 1 STATUS ADDR read port MSBs echo register address; LSBs indicate which slots request data 2 STATUS DATA read port 3, 4 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 5.2.1. AC-Link Variable Sample Rate Operation The AC-Link serial interconnect defines a digital data and control pipe between the Controller and the CODEC. The AC-Link supports 12 20-bit slots at 48 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ For variable sample rate input, the tag bit for each input slot indicates whether valid data is present or not. Thus, even in variable sample rate mode, the CODEC is always ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 5.3. AC-Link Output Frame (SDATA_OUT) The AC-Link output frame data streams correspond to the multiplexed bundles of all digital output data targeting AC‘97’s DAC inputs, and control registers. As mentioned earlier, ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ resolution of the implemented DAC (16 20-bit biasing will be introduced by the least significant bits. When mono audio sample streams are output from the AC‘97 Controller, ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Note that shadowing of the control register file on the AC‘97 Controller is an option left open to the implementation of the AC‘97 Controller. The AC‘97 CODEC’s control register file is ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 5.3.8. Slot 12: Audio GPIO Control Channel AC-Link output frame slot 12 contains the audio GPIO control outputs. 5.4. AC-Link Input Frame (SDATA_IN) The AC-Link input frame data streams correspond to ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 5.4.1. Slot 0: TAG Within slot 0, the first bit is a global bit (SDATA_IN slot 0, bit 15) which flags whether the AC‘97 CODEC is in the “CODEC Ready” state ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 5.4.1.2. The status port is used to monitor status for the STAC9758/9759 functions including, but not limited to, mixer settings and power management. AC-Link input frame slot 1s stream echoes the ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 5.4.3. Slot 3: PCM Record Left Channel Audio input frame slot 3 is the left channel output of STAC9758/9759 input MUX, post-ADC. STAC9758/9759 ADCs are implemented to support 20-bit resolution. The ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 5.5. AC-Link Interoperability Requirements and Recommendations 5.5.1. “Atomic slot” Treatment of Slot 1 Address and Slot 2 Data Command or Status Address and Data cannot be split across multiple AC-Link frames. ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Figure 18. Bi-directional AC-Link Frame with Slot Assignments OUTGOING STREAMS (Controller output - SDATA_OUT) INCOMING STREAMS (codec output - SDATA_IN) TAG PHASE Note: The DAC & ADC can be assigned to ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Slot Name 9 Slot Pair 3R 10 Slot Pair 4L 11 Slot Pair 4R 12 Interrupt Control The ADC and the SPDIF Inputs can be separately assigned to any of the ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 6. STAC9758/9759 MIXER • Mixer Inputs • Analog PC Beep, Digital PC Beep, Phone, Aux In, Line In (has pre-select mux for jack sharing/ Universal Jacks DAC-B • Split-mute option on ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 6.3. ADAT Optical “Lightpipe” Support Pin 48 can be switched to an alternate ADAT Optical Output mode to provide up to 8channels of royalty-free uncompressed 24-bit, 48 KHz and 44.1 KHz ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 7. STAC9758/9759 MIXER DIAGRAM KEY MonoAnalog StereoAnalog Digital 68h, Page 00h, D14-13 AC Link Slot SDATA_IN Select Slots 3,4,6,7,8,9,10,11 SPDIF SPDIF Emable and SPDIF_IN 4 7 Select 68h Page 00h, Receiver ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8. PROGRAMMING REGISTERS 8.1. Program Register List Address 00h 02h 04h 06h 0Ah 0Ch 0Eh 10h 12h 14h 16h 18h 1Ah 1Ch 20h 22h 24h 26h 28h 2Ah 2Ch 2Eh 30h ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Address 54h 60h 60h (Page 01h) 62h 62h (Page 01h) 64h 64h (Page 01h) 66h 66h (Page 01h) 68h 68h (Page 01h) 6Ah 6Ah (Page01h) 6Ch 6Ch (Page01h) 6Eh 6Eh (Page01h) ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2. Program Register Descriptions 8.2.1. Reset (00h) Default: 6A90h D15 D14 RSRVD SE4 D7 ID7 Writing any value to this register performs a register reset, which causes most registers to revert ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.2. Master Volume Registers (02h) Controls Volume of Stereo Mix Output. Default: 8000h D15 D14 Mute RESERVED D7 RMute RESERVED Bit(s) Reset Value R 12:8 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.3. DAC-A Volume Register (04h) Default: 8000h D15 D14 Mute RESERVED D7 RMute RESERVED Bit(s) Reset Value R 12 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.4. Master Volume MONO (06h) Default: 8000h D15 D14 Mute D7 RESERVED Bit(s) Reset Value R 14 4:0 0 8.2.5. PC BEEP Volume (0Ah) Default: 0000h ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.6. Digital PC Beep The AC’97 2.3 specification calls for the CODEC to generate a square wave tone at a particular vol- ume and frequency. Typically, the BIOS will program this ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Bit(s) Reset Value R/W 14:5 0 4:0 08 IDT™ HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Name RO RESERVED Bits not used, should read back 0 Phone Volume Control 00h ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.8. Mono/Stereo Mic Volume (0Eh) Mic is actually one of 6 possible stereo input sources selected by the MicMux (Reg 66h, Page 0, Bits D2:D0). Each of these sources may be ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.8.2. Enabled when Stereo Mic Enable Bit (STMICEN), Reg 72h, Page 0, Bit Default: 8008h. D15 D14 LMute D7 RMute BOOSTEN Bit(s) Reset Value R 14:13 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.9. Line In Volume (10h) Default: 8808h. D15 D14 Mute D7 RMute Bit(s) Reset Value R 14: 6:5 0 4:0 08 Line_In may be ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.10. CD Volume (12h) Default: 8808h. D15 D14 Mute D7 RMute Bit(s) Reset Value R 14: 6:5 0 4:0 08 IDT™ HIGH-PERFORMANCE 6-CHANNEL AC’97 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.11. DAC-B to Mixer2 Volume Control (14h) Default: 8808h. D15 D14 Mute D7 RMute Bit(s) Reset Value R 14: 6:5 0 4:0 08 8.2.11.1. ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ select pin 16 and 17, this will set up an extra Line In that can be used as Video In. Line In will still be available using the standard pins 23 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.12. Aux Volume (16h) Default: 8808h. D15 D14 Mute D7 RMute Bit(s) Reset Value R 14: 6:5 0 4:0 08 IDT™ HIGH-PERFORMANCE 6-CHANNEL AC’97 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.13. PCMOut Volume (18h) Default: 8808h. D15 D14 Mute D7 RMute Bit(s) Reset Value R 14: 6:5 0 4:0 08 Note: WDM Drivers normally ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.14. Record Select (1Ah) Default: 0000h (corresponding to Mic in) Used to select the record source independently for right and left. D15 D14 D7 Bit(s) Reset Value R/W 15:11 0 10:8 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.15. Record Gain (1Ch) Default: 8000h (corresponding gain with mute on) D15 D14 Mute D7 RMute Bit(s) Reset Value R 14: ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.16. General Purpose (20h) Default: 0000h D15 D14 POP RESERVED D7 LOOPBACK Bit(s) Reset Value R 11: ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.17. 3D Control (22h) Default: 0000h D15 D14 D7 Bit(s) Reset Value R/W 15:4 0 3:2 0 1:0 0 This register is used to control the 3D stereo enhancement function, IDT ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.18. Audio Interrupt and Paging (24h) Default: 0000h D15 D14 I4 D7 Bit(s) Reset Value R 14- IDT™ HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Bit(s) Reset Value R/W 10:4 0 3:0 0 IDT™ HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Name RO RESERVED Bits not used, should read back 0 Page Selector 00h = ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.19. Powerdown Ctrl/Stat (26h) Default: 000Fh D15 D14 EAPD PR6 D7 Bit(s) Reset Value R ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.19.1. The lower half of this register is read-only status indicating that each subsection is “ready”. Ready is defined as the subsection's ability to perform in its nominal state. ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.20. Extended Audio ID (28h) Default: 0BC7h D15 D14 ID1 D7 SDAC CDAC The Extended Audio ID register is a read only register except for bits D4 and D5. ID1 and ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ CODEC ID ALL DSA1, DSA0 00 (default IDT™ HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ AMAP Defaults Function DAC1 6-ch Primary w/ SPDIF 3 & 4 DSA ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.2.21. Extended Audio Control/Status (2Ah) Default: 05F0h D15 D14 VCFG RESERVED D7 SDAC CDAC Note: If pin 48 is held high at powerup, the SPDIF is not available and bits D15:D1 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Bit(s) Reset Value R/W 5 8.2.21.1. The Extended Audio Status Control register also contains one active bit to enable or disable the ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ fers and every audio frame will include an active slot request flag. Data is transferred every frame in this case. For variable sample rate output, the CODEC examines its sample rate ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ If VRA is set any write to this address will be ignored and the rate remains at 48KHz. 8.3.1. PCM DAC Rate (2Ch) Controls DAC-A (Front) and DAC-CL ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.3.4. PCM LR ADC Rate (32h) Default: BB80h ( see table20: page 77 ) D15 D14 SR15 SR14 D7 SR7 SR6 8.3.5. Center/LFE Volume (36h) Default: 8080h D15 D14 MUTE RESERVED ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Bit(s) Reset Value 12 4:0 0 8.3.7. SPDIF Control (3Ah) Default: 2000h D15 D14 V DRS D7 CC3 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Bit(s) Reset Value R 13: 10 IDT™ HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.4. General Purpose Input & Outputs 8.4.1. EAPD EAPD can act as a GPIO, but is unaffected by the following registers. To use EAPD as a GPIO, use Register 74h, the ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.4.4. Extended Modem Status and Control Register (3Eh) Default: 0100h D15 D14 D7 Bit(s) Reset Value 15 7 8.4.5. GPIO Pin Configuration Register (4Ch) Default: ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.4.6. GPIO Pin Polarity/Type Register (4Eh) Default: FFFFh D15 D14 D7 Bit(s) Reset Value 15:4 FFFh 8.4.7. GPIO Pin Sticky Register (50h) Default: ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.4.8. GPIO Pin Mask Register (52h) Default: 0000h D15 D14 D7 Bit(s) Reset Value 15 8.4.9. GPIO Pin Status Register (54h) Default: ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.5. Extended CODEC Registers Page Structure Definition Registers 60h-68h are the Extended CODEC Registers. These registers allow for the definition of further capabilities. These bits provide a paged address space for ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Reg NAME 6Ch DAC Slot Mapping 6Eh ADC Slot Mapping 8.6.1. SPDIF_In Status 1 Register (60h, Register 24h must be set to Page 00h to access this register. Default:0000h D15 D14 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Bit(s) Reset Value R/W 15:13 0 12:8 * 7:0 ** 8.6.3. SPDIF_In Status 2 Register (62h, Register 24h must be set to Page 00h to access this register. Second of two ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Bit(s) Reset Value R/W 7:4 0 3:0 0 8.6.4. PCI SVID (62h Register 24h must be set to Page 01h to access this register. Default: FFFFh D15 D14 PVI15 PVI14 D7 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Bit(s) Reset R/W 11 RESERVED Bit not used, ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.6.7. Universal Jack Register 24h must be set to Page 00h to access this register. Default: 0201h D15 D14 D7 Bit(s) Reset Value R/W 15:11 0 10:8 010 7:3 0 2:0 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.6.8. Function Select (66h Register 24h must be set to Page 01h to access this register. Default: 0000h D15 D14 D7 RESERVED Bit(s) Reset Source R/W Reset Value 15-5 n/a 4-1 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.6.9. I/O Misc. (68h, Register 24h must be set to Page 00h to access this register. Default: 2001h D15 D14 NOBLKCHK SPIS A1 D7 P48 MO P47 M1 Bit(s) Reset Value ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Bit(s) Reset Value R 1:0 01 8.6.10. Function Information (68h Register 24h must be set to Page 01h to access this register. Default: 0010h D15 D14 G4 D7 DL2 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Bit(s) R/W Reset Value 9:5 RW see table 4 RW see table 3 see table G[4:0] 00000 00001 01111 10001 11111 IDT™ HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.6.11. Digital Audio Control (6Ah, To access Register 6Ah, Page 00h must be selected in Register 24h. Default: 0000h D15 D14 D7 Bit(s) Reset Value R/W 15 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.6.12. Sense Details (6Ah Register 24h must be set to Page 01h to access this register. Default: NA D15 D14 ST2 ST1 D7 OR1 OR0 Bit(s) R/W Reset Value 15-13 RW ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.6.13. Revision Code (6Ch, To access Register 6Ch, Page 00h must be selected in Register 24h. Default: xxxxh D15 D14 D7 Bit(s) Reset Value R/W 15:12 0 11:8 ** 7:4 0 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.6.15. Analog Special (6Eh, To access Register 6Eh, Page 00h must be selected in Register 24h. Default: 1000h D15 VREFOUTL VREFOUT VL DISABLE D7 DAC-CR MUTEFIX INV DISABLE Bit(s) Reset Value ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Bit(s) Reset Value R 5 IDT™ HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Name 0 = Single ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.6.16. ADC Slot Mapping (6Eh, To access Register 6Eh, Page 01h must be selected in Register 24h. Default: 3000h D15 D14 LIA3 LIA2 D7 Bit(s) Reset Value R/W 15:12 0011 11:1 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Bit(s) Reset Value R IDT™ HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Name 0 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.6.19. EAPD Access Register (74h) Default: 0800h D15 D14 EAPD D7 Bit(s) Reset Value R 14: 10 IDT™ HIGH-PERFORMANCE ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.6.20. Analog Misc. (76h) Default: 0000h D15 D14 D7 8.6.21. ADAT Control and HPF Bypass (78h) Default: 0000h D15 D14 ADAT3 ADAT2 D7 RESERVED Bit(s) Reset Value R/W 15:12 0000 11:2 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 8.7. Vendor ID1 and ID2 (7Ch and 7Eh) These two registers contain four 8-bit ID codes. The first three codes have been assigned by Microsoft using their Plug and Play Vendor ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 9. LOW POWER MODES The STAC9758/9759 is capable of operating at reduced power when no activity is required. The state of power down is controlled by the Powerdown Register (26h). There ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Figure 21. Powerdown/Powerup Flow With Analog Still Active & Figure 21 illustrates a state when ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 10.MULTIPLE CODEC SUPPORT The STAC9758/9759 provides support for the multi-CODEC option according to the Intel AC'97, rev 2.3 specification. The CODEC ID functions as a chip select. Secondary devices therefore have ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 10.2. Secondary CODEC Register Access Definitions The AC'97 Digital Controller can independently access Primary and Secondary CODEC registers by using a 2-bit CODEC ID field (chip select) which is defined as ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 11. TESTABILITY The STAC9758/9759 has three test modes. One is for ATE in-circuit test and the other two are restricted for internal use. STAC9758/9759 enters the ATE in-circuit test mode if ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 12.PIN DESCRIPTION EAPD/SPDIFI 47 SPDIFO/ADAT 48 Note: For use of pins 16/17 for Video, see section 8.2.11.1: page60. Note: If pin 48 is held high at powerup, register 28h (Extended Audio ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Pin Name XTL_OUT SDATA_OUT BIT_CLK SDATA_IN SYNC RESET# GPIO0 GPIO 1 GPIO 2 GPIO 3 CID1 EAPD/SPDIFI SPDIFO/ ADAT 12.2. Analog I/O These signals connect the STAC9758/9759 to analog sources and ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Pin Name FRONT_R* MONO SURR_L* AVss3 SURR_R* CTR* LFE any unused input pins should be tied together and tied to ground through a capacitor (0.1 µF suggested), except the ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 13. ORDERING INFORMATION Part Number STAC9758XXTAEyyX 48-pin TQFP 7mm x 7mm x 1.4mm STAC9759XXTAEyyX 48-pin TQFP 7mm x 7mm x 1.4mm NOTE the revision, contact sales for current orderables. ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 15. SOLDER REFLOW PROFILE 15.1. Standard Reflow Profile Data Note: These devices can be hand soldered at 360 FROM: IPC / JEDEC J-STD-020C “Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 15.2. Pb Free Process - Package Classification Reflow Temperatures Package Type IDT™ HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ TQFP 48-pin 115 MSL Reflow Temperature o 3 260 STAC9758/9759 PC ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 16.APPENDIX A: PROGRAMMING REGISTERS Reg # Name D15 00h Reset RSRVD 02h Master Volume Mute RSVD 04h DAC-A Volume Mute RSVD 06h Master Volume Mono Mute 0Ah PC_BEEP Volume Mute RSVD ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Reg # Name D15 68h NOBLK I/O Misc SPISA1 SPISA0 Page 00h CHK 68h Function Information G4 Page 01h 6Ah Digital Audio Control Page 00h 6Ah Sense Details ST2 Page 01h ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ 17.REVISION HISTORY Revision Date Updated power consumption numbers. Inserted performance numbers to replace TBDs. Corrected Register 68, Page 0, Bit D8 (HP3dB) inverted values. Corrected Register 68, Page 0, Bit D6:5 ...
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STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ Innovate with IDT audio for high fidelity. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United ...