IDTSTAC9758XXTAEB1XR IDT, Integrated Device Technology Inc, IDTSTAC9758XXTAEB1XR Datasheet - Page 70

• Manufacturer Part Number: IDTSTAC9758XXTAEB1XR
• Description: IC CODEC AC'97 6CH 2.3 48-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Audio Codec '97r

Specifications of IDTSTAC9758XXTAEB1XR

• Data Interface: Serial
• Resolution (bits): 20 b
• Number Of Adcs / Dacs: 2 / 3
• Sigma Delta: Yes
• Voltage - Supply, Analog: 3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP, 48-VQFP
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 3.135V
• Single Supply Voltage (max): 3.465/5.25V
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: STAC9758XXTAEB1XR

IDT™
HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™
STAC9758/9759
HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™
8.2.19.
Bit(s) Reset Value R/W
7:4
15
14
13
12
11
10
9
8
3
2
1
0
EAPD
D15
D7
Powerdown Ctrl/Stat (26h)
Default: 000Fh
0
0
0
0
0
0
0
0
0
1
1
1
1
D14
PR6
D6
RW
RW
RW
RW
RW
RW
RW
RW
RO RESERVED Bit not used, should read back 0
RO
RO
RO
RO
RESERVED
Name
EAPD
DAC
ADC
PR6
PR5
PR4
PR3
PR2
PR1
PR0
REF
ANL
PR5
D13
D5
1 = Forces EAPD pad to Vdd
0 = Forces EAPD pad to Gnd
0 = Headphone Amplifier powered up
1 = Headphone Amplifier powered down
0 = Digital Clk active
1 = Digital Clk disable.
0 = digital active
1 = Powerdown: PLL, AC-Link, Crystal oscillator;
0 = VAG/VREF and VREFOUT are active
1 = VAG/VREF and VREFOUT are powered down, and PR2 is asserted in
0 = analog active
1 = all signal path analog is powered down
(VREFout and VAG still on, user should set PR0, PR1, PR6 prior to setting
PR2)
0 = ALL DACs powered up
1 = ALL DACs powered down
PR1 is the global DAC power down, and powers down all DACs. PR1 is
ORed with respective PR1, PRJ, PRK and PR_DAC_A bits
0 = ADC powered up
1 = ADC powered down
VREF status
1 = VREF’S enabled
ANALOG MIXERS, etc. Status
1 = analog mixers ready.
DAC Status
1 = DAC ready to playback (Front DAC only)
The PR_DAC_A bit is used to independently power down DAC-A
ADC Status
1 = ADC ready to record
Forced low: bit clock, SDATA_IN
Disabled: DSP clk, SPDIF clk
analog block
PR4
D12
70
D4
PR3
REF
D11
D3
Description
STAC9758/9759
D10
PR2
ANL
D2
DAC
PR1
D9
D1
PC AUDIO
ADC
PR0
V 1.2 1206
D8
D0