STTS424E02CDA6F STMicroelectronics, STTS424E02CDA6F Datasheet - Page 34

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STTS424E02CDA6F

Manufacturer Part Number
STTS424E02CDA6F
Description
Board Mount Temperature Sensors MEM Module Temp Sens 2Kb SPD
Manufacturer
STMicroelectronics
Datasheet

Specifications of STTS424E02CDA6F

Full Temp Accuracy
+/- 3 C
Package / Case
DFN EP
Digital Output - Bus Interface
Serial (2-Wire, I2C)
Digital Output - Number Of Bits
10 bit
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Output Type
Analog
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
SPD EEPROM operation
5.6.2
5.6.3
5.6.4
Table 22.
34/50
Protected with
Not Protected
Permanently
protected
Status
SWP
Current address read - SPD
For the current address read operation, following a start condition, the bus master only
sends a device select code with the R/W bit set to 1. The device acknowledges this, and
outputs the byte addressed by the internal address counter. The counter is then
incremented. The bus master terminates the transfer with a stop condition, as shown in
Figure
Sequential read - SPD
This operation can be used after a current address read or a random address read. The bus
master does acknowledge the data byte output, and sends additional clock pulses so that
the device continues to output the next byte in sequence. To terminate the stream of bytes,
the bus master must not acknowledge the last byte, and must generate a stop condition, as
shown in
The output data comes from consecutive addresses, with the internal address counter
automatically incremented after each byte output. After the last memory address, the
address counter ‘rolls-over’, and the device continues to output data from memory address
00h.
Acknowledge in read mode
For all read commands, the device waits, after each byte read, for an acknowledgment
during the 9
time, the device terminates the data transfer and switches to its standby mode.
Table 22
status.
Acknowledge when writing data or defining the write-protection (instructions with
R/W bit=0)
Level
Input
WC
X
0
0
14, without acknowledging the byte.
and
Figure
PSWP, SWP or CWP NoACK
PSWP, SWP or CWP
Page or byte write in
Page or byte write in
Page or byte write
th
lower 128 bytes
lower 128 bytes
Table 23
bit time. If the bus master does not drive serial data (SDA) low during this
Instruction
14.
PSWP
SWP
CWP
show how the ACK bits can be used to identify the write-protection
Doc ID 13448 Rev 8
NoACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
significant
significant
significant
significant
significant
Address
Address
Address
Address
Not
Not
Not
Not
Not
NoACK
NoACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
Data byte
significant
significant
significant
significant
significant
Data
Data
Data
Not
Not
Not
Not
Not
NoACK
NoACK
NoACK
NoACK
ACK
ACK
ACK
ACK
ACK
STTS424E02
cycle(t
Write
Yes
Yes
Yes
Yes
No
No
No
No
W
)

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