AD1888JCP-REEL Analog Devices Inc, AD1888JCP-REEL Datasheet - Page 24

IC CODEC AUDIO-PC AC'97 48LFCSP

AD1888JCP-REEL

Manufacturer Part Number
AD1888JCP-REEL
Description
IC CODEC AUDIO-PC AC'97 48LFCSP
Manufacturer
Analog Devices Inc
Series
SoundMAX®r
Type
Audio Codec '97r
Datasheet

Specifications of AD1888JCP-REEL

Data Interface
Serial
Resolution (bits)
16, 20 b
Number Of Adcs / Dacs
2 / 6
Sigma Delta
No
Dynamic Range, Adcs / Dacs (db) Typ
80 / 90
Voltage - Supply, Analog
4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.15 V ~ 3.45 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN, CSP Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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AD1888
Table 38. Settings for Surround Register
D15/D7
0
0
0
0
1
Table 39. SPDIF Control Register (Index 3Ah)
Reg
No.
3Ah
All registers not shown and bits containing an X are assumed to be reserved.
Register 3Ah is a read/write register that controls SPDIF functionality and manages bit fields propagated as channel status (or subframe in the V case). With the
exception of V, this register should only be written to when the SPDIF transmitter is disabled (SPDIF Bit in Register 2Ah is 0). This ensures that control and status
information starts up correctly at the beginning of SPDIF transmission.
PRO
/AUD
COPY
PRE
CC[6-0]
L
SPSR[1,0]
V
Name
SPDIF
Control
Professional. 1 indicates professional use of channel status, 0 indicates consumer.
Non-Audio. 1 indicates data is non PCM format, 0 indicates data is PCM.
Copyright. 1 indicates copyright is asserted, 1 indicates copyright is not asserted.
Pre-emphasis. 1 indicates filter pre-emphasis is 50 μs/15 μs, 0 indicates pre-emphasis is none.
Category Code. Programmed according to IEC standards, or as appropriate.
Generation Level. Programmed according to IEC standards, or as appropriate.
SPDIF Transmit Sample Rate:
SPSR[1:0] = 00 Transmit Sample Rate = 44.1 kHz
SPSR[1:0] = 01 Reserved
SPSR[1:0] = 10 Transmit Sample Rate = 48 kHz (default)
SPSR[1:0] = 11 Not supported.
Validity. This bit affects the Validity flag (Bit 28 transmitted in each SPDIF L/R subframe) and enables the SPDIF transmitter to
maintain connection during error or mute conditions.
V = 1 Each SPDIF subframe (L + R) has Bit 28 set to 1. This tags both samples as invalid.
V = 0 Each SPDIF subframe (L + R) has Bit 28 set to 0 for valid data and 1 for invalid data (error condition).
Note that when V = 0, asserting the VFORCE bit (D15) in Register 2Ah (Ext’d Audio Stat/Ctrl) will force the Validity flag low,
marking both samples as valid.
WRITE
00 0000
00 1111
01 1111
1x xxxx
xx xxxx
D15
V
Right Surround D[5:0]
Left Surround D[13:8]
D14
X
READBACK
00 0000
00 1111
01 1111
01 1111
xx xxxx
D13
SPSR1
D12
SPSR0
D11
L
Function with AC97NC = 0
0 dB Gain
−22 dB Gain
−46.5 dB Gain
−46.5 dB Gain
Muted
Surround Volume (38h)
CC6
D10
Rev. A | Page 24 of 32
Control Bits
D9
CC5
D8
CC4
D7
CC3
CC2
D6
D5
CC1
D4
CC0
Function with AC97NC = 1
12 dB Gain
−10.5 dB Gain
−34.5 dB Gain
Not Applicable
Muted
D3
PRE
D2
COPY
D1
/AUD
D0
PRO
Default
2000h

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