AD1888JCP-REEL Analog Devices Inc, AD1888JCP-REEL Datasheet - Page 6

IC CODEC AUDIO-PC AC'97 48LFCSP

AD1888JCP-REEL

Manufacturer Part Number
AD1888JCP-REEL
Description
IC CODEC AUDIO-PC AC'97 48LFCSP
Manufacturer
Analog Devices Inc
Series
SoundMAX®r
Type
Audio Codec '97r
Datasheet

Specifications of AD1888JCP-REEL

Data Interface
Serial
Resolution (bits)
16, 20 b
Number Of Adcs / Dacs
2 / 6
Sigma Delta
No
Dynamic Range, Adcs / Dacs (db) Typ
80 / 90
Voltage - Supply, Analog
4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.15 V ~ 3.45 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN, CSP Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD1888JCP-REEL
Manufacturer:
AD
Quantity:
2 500
Part Number:
AD1888JCP-REEL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD1888
TIMING PARAMETERS
Guaranteed over operating temperature range.
Table 2.
Parameter
RESET Active Low Pulse Width
RESET Inactive to BIT_CLK Startup Delay
SYNC Active High Pulse Width
SYNC Low Pulse Width
SYNC Inactive to BIT_CLK Startup Delay
BIT_CLK Frequency
BIT_CLK Frequency Accuracy
BIT_CLK Period
BIT_CLK Output Jitter
BIT_CLK High Pulse Width
BIT_CLK Low Pulse Width
SYNC Frequency
SYNC Period
Setup to Falling Edge of BIT_CLK
Hold from Falling Edge of BIT_CLK
BIT_CLK Rise Time
BIT_CLK Fall Time
SYNC Rise Time
SYNC Fall Time
SDATA_IN Rise Time
SDATA_IN Fall Time
SDATA_OUT Rise Time
SDATA_OUT Fall Time
End of Slot 2 to BIT_CLK, SDATA_IN Low
Setup to RESET Inactive (SYNC, SDATA_OUT)
Rising Edge of RESET to Hi-Z Delay
Propagation Delay
RESET Rise Time
Output Valid Delay from BIT_CLK Rising
1
2
Guaranteed but not tested.
Output jitter directly dependent on crystal input jitter.
1, 2
SDATA_IN
BIT_CLK
RESET
BIT_CLK
SYNC
Figure 2. Cold Reset Timing (Codec is Supplying the Bit_CLK Signal)
t
Figure 3. Warm Reset Timing
SYNC_HIGH
t
RST_LOW
Rev. A | Page 6 of 32
t
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
RST_LOW
RST2CLK
SYNC_HIGH
SYNC_LOW
SYNC2CLK
CLK_PERIOD
CLK_HIGH
CLK_LOW
SYNC_PERIOD
SETUP
HOLD
RISECLK
FALLCLK
RISESYNC
FALLSYNC
RISEDIN
FALLDIN
RISEDOUT
FALLDOUT
S2_PDOWN
SETUP2RST
OFF
t
t
TRI2ACTV
TRI2ACTV
t
SYNC2CLK
t
RST2CLK
Min
162.8
162.8
40
39.7
4
3
2
2
2
2
2
2
2
2
0
15
Typ
1.0
1.3
19.5
12.288
81.4
750
48.0
20.8
4
4
4
4
4
4
4
4
Max
400,000
±1.0
41.7
41.4
6
6
6
6
6
6
6
6
1.0
25
15
50
15
Unit
μs
ns
μs
μs
ns
MHz
ppm
ns
ps
ns
ns
kHz
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
ns
ns
ns

Related parts for AD1888JCP-REEL