SC18IS602BIPW,112 NXP Semiconductors, SC18IS602BIPW,112 Datasheet - Page 4
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SC18IS602BIPW,112
Manufacturer Part Number
SC18IS602BIPW,112
Description
IC BRIDGE SPI/I2C 16-TSSOP
Manufacturer
NXP Semiconductors
Specifications of SC18IS602BIPW,112
Controller Type
I²C Bus Controller
Interface
I²C
Voltage - Supply
2.4 V ~ 3.6 V
Current - Supply
11mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Operating Temperature Classification
Military
Operating Temperature (max)
125C
Package Type
TSSOP
Rad Hardened
No
Maximum Operating Frequency
4.5 MHz
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 55 C
Mounting Style
SMD/SMT
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.4 V
For Use With
568-4705 - DEMO BOARD I2C TO SPI SC18IS602
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4785-5
935286182112
SC18IS602BIPW
SC18IS602BIPW,112
SC18IS602BIPW
935286182112
SC18IS602BIPW
SC18IS602BIPW,112
SC18IS602BIPW
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SC18IS602BIPW,112
Manufacturer:
NXP
Quantity:
463
NXP Semiconductors
7. Functional description
SC18IS602B
Product data sheet
7.1 I
The SC18IS602B acts as a bridge between an I
I
The I
connected to the bus, and it has the following features:
A typical I
UM10204, “I
www.nxp.com/documents/user_manual/UM10204.pdf.)
The SC18IS602B device provides a byte-oriented I
transfers up to 400 kHz. When the I
device will be a slave-transmitter. The SC18IS602B will be a slave-receiver when the
I
master, however, it does have the ability to hold the SCL line LOW between bytes to
complete its internal processes.
2
2
2
Fig 3.
C-bus master device to communicate with any SPI-enabled device.
•
•
•
•
•
•
C-bus master is sending data. At no time does the SC18IS602B act as an I
C-bus interface
Bidirectional data transfer between masters and slaves
Multi-master bus (no central master)
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer
The I
2
C-bus uses two wires (SDA and SCL) to transfer information between devices
2
I
2
2
C-bus may be used for test and diagnostic purposes
C-bus configuration is shown in
C-bus configuration
2
C-bus specification and user manual”, at
All information provided in this document is subject to legal disclaimers.
I
2
C-bus
Rev. 5 — 3 August 2010
SC18IS602B
V
DD
2
R PU
C-bus master is reading data from SC18IS602B, the
Figure
I
DEVICE
2
C-BUS
2
C-bus and an SPI interface. It allows an
R PU
3. (Refer to NXP Semiconductors
2
C-bus interface that supports data
I
DEVICE
2
C-BUS
SC18IS602B
002aac445
I
2
C-bus to SPI bridge
SDA
SCL
© NXP B.V. 2010. All rights reserved.
2
C-bus
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