KSZ8873RLL Micrel Inc, KSZ8873RLL Datasheet - Page 26

IC ETHERNET SWITCH 3PORT 64-LQFP

KSZ8873RLL

Manufacturer Part Number
KSZ8873RLL
Description
IC ETHERNET SWITCH 3PORT 64-LQFP
Manufacturer
Micrel Inc
Datasheets

Specifications of KSZ8873RLL

Data Rate
100Mbps
Controller Type
Ethernet Switch Controller
Interface
RMII
Voltage - Supply
1.8V, 2.5V, 3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
No. Of Ports
3
Ethernet Type
IEEE 802.3u
Supply Current
115mA
Supply Voltage Range
2.5V, 3.3V
Digital Ic Case Style
LQFP
No. Of Pins
64
Svhc
No SVHC (15-Dec-2010)
Base
RoHS Compliant
Number Of Primary Switch Ports
3
Internal Memory Buffer Size
32
Fiber Support
No
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog/Digital
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
1.89/3.465V
Operating Temperature Classification
Commercial
Interface Type
MII, RMII
Operating Temperature Range
0°C To +70°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-3461

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8873RLL
Manufacturer:
Micrel
Quantity:
315
Part Number:
KSZ8873RLL
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8873RLLI
0
Part Number:
KSZ8873RLLI TR
Manufacturer:
MAXIM
Quantity:
6 700
Micrel, Inc.
The KSZ8873MLL/FLL/RLL will not forward the following packets:
1. Error packets
2. IEEE802.3x PAUSE frames
3. "Local" packets
September 2009
These include framing errors, Frame Check Sequence (FCS) errors, alignment errors, and illegal size
packet errors.
KSZ8873MLL/FLL/RLL intercepts these packets and performs full duplex flow control accordingly.
Based on destination address (DA) lookup. If the destination port from the lookup table matches the port
from which the packet originated, the packet is defined as "local."
Figure 5. Destination Address Resolution Flow Chart, Stage 2
Spanning Tree
IGMP Process
Membership
Port Mirror
Port VLAN
Process
Process
Check
PTF1
PTF2
- Check receiving port's receive enable bit
- Check destination port's transmit enable bit
- Check whether packets are special (BPDU
- Applied to MAC #1 and MAC #2
- MAC #3 is reserved for
- IGMP will be forwarded to port 3
- RX Mirror
- TX Mirror
- RX or TX Mirror
- RX and TX Mirror
or specified)
microprocessor
26
KSZ8873MLL/FLL/RLL
M9999-092309-1.2

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