TDA8023TT/C1,118 NXP Semiconductors, TDA8023TT/C1,118 Datasheet - Page 10

• Manufacturer Part Number: TDA8023TT/C1,118
• Description: IC SMART CARD INTERFACE 28-TSSOP
• Manufacturer: NXP Semiconductors

Specifications of TDA8023TT/C1,118

• Package / Case: 28-TSSOP
• Controller Type: Smart Card Interface
• Interface: I²C
• Voltage - Supply: 2.7 V ~ 6.5 V
• Current - Supply: 200mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935274975118; TDA8023TT-T; TDA8023TT-T

NXP Semiconductors
Table 6.
TDA8023_1
Product data sheet
Bit
7
6
5
4
3
2
1
0
Register 0
Read mode
Status
ACTIVE
EARLY
MUTE
PROT
SUPL
CLKSW
PRESL
PRES
Table of registers
8.3.5 Registers
Table 7.
When at least one of the bits PRESL, PROT, MUTE and EARLY is set, pin INT goes LOW
until the status byte has been read. After power-on, bit SUPL is set until the status byte
has been read, and pin INT = LOW until the voltage supervisor becomes inactive.
Table 8.
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5 and 4
Write mode
Command
VCC1V8
I/OEN
REG1
REG0
PDWN
5V/3VN
WARM
START
Symbol
ACTIVE
EARLY
MUTE
PROT
SUPL
CLKSW
PRESL
PRES
Symbol
VCC1V8
I/OEN
REG[1:0]
Status - Register 0 in Read mode bit description
Command - Register 0 in Write mode bit description
Register 1
Read/Write mode
REG1 = 0
REG0 = 0
TEST
RSTIN
C8
C4
CLKPD2
CLKPD1
CLKDIV2
CLKDIV1
Description
set if the card is active; reset if the card is inactive
set during Answer To Reset (ATR) when the selected card has answered
too early
set during ATR when the card has not answered during the ISO 7816
time slots
set when an overload or an overheating has occurred during a session;
reset when the status has been read
set when the voltage supervisor has signalled a fault; reset when the
status has been read
set when the TDA8023 is in Power-down mode and the clock has
changed
set when the card has been inserted or extracted; reset when the status
has been read
set when the card is present; reset when the card is not present
Description
1: V
0: V
this bit can not change if bit START is logic 1
1: signal on pin I/OUC is transferred to pin I/O
0: pin I/OUC and pin I/O are high-impedance
selection of subaddress in Register 1 (see
Rev. 01 — 16 July 2007
CC
CC
= 1.8 V
is defined by bit 5V/3VN
REG0 = 1
D7
D6
D5
D4
D3
D2
D1
D0
REG1 = 1
REG0 = 0
C15
C14
C13
C12
C11
C10
C9
C8
Low power IC card interface
Table
9, 10,
TDA8023
© NXP B.V. 2007. All rights reserved.
11
REG0 = 1
C7
C6
C5
C4
C3
C2
C1
C0
and 12)
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