UJA1076TW/5V0/WD,1 NXP Semiconductors, UJA1076TW/5V0/WD,1 Datasheet - Page 6
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UJA1076TW/5V0/WD,1
Manufacturer Part Number
UJA1076TW/5V0/WD,1
Description
IC SBC CAN HS 5V 32HTSSOP
Manufacturer
NXP Semiconductors
Datasheet
1.UJA1076TW5V0118.pdf
(47 pages)
Specifications of UJA1076TW/5V0/WD,1
Controller Type
System Basis Chip
Interface
SPI
Voltage - Supply
4.5 V ~ 28 V
Current - Supply
82µA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
6. Functional description
UJA1076_2
Product data sheet
Table 2.
The exposed die pad at the bottom of the package allows for better heat dissipation from
the SBC via the printed circuit board. The exposed die pad is not connected to any active
part of the IC and can be left floating, or can be connected to GND.
The UJA1076 combines the functionality of a high-speed CAN transceiver, two voltage
regulators and a watchdog (UJA1076/xx/WD versions) in a single, dedicated chip. It
handles the power-up and power-down functionality of the ECU and ensures advanced
system reliability. The SBC offers wake-up by bus activity, by cyclic wake-up and by the
activation of external switches. Additionally, it provides a periodic control signal for pulsed
testing of wake-up switches, allowing low-current operation even when the wake-up
switches are closed in Standby mode.
All transceivers are optimized to be highly flexible with regard to bus topologies. In
particular, the high-speed CAN transceiver is optimized to reduce ringing (bus reflections).
V1, the main voltage regulator, is designed to power the ECU's microcontroller, its
peripherals and additional external transceivers. An external PNP transistor can be added
to improve heat distribution. V2 supplies the integrated high-speed CAN transceiver. The
watchdog is clocked directly by the on-chip oscillator and can be operated in Window,
Timeout and Off modes.
Symbol
WAKE1
WAKE2
V2
CANH
CANL
GND
SPLIT
i.c.
i.c.
i.c.
WBIAS
VEXCC
TEST2
VEXCTRL
BAT
Pin description
Pin
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
All information provided in this document is subject to legal disclaimers.
Description
local wake-up input 1
local wake-up input 2
5 V voltage regulator output for CAN
CANH bus line
CANL bus line
ground
CAN bus common mode stabilization output
internally connected; should be left floating
internally connected; should be left floating
internally connected; should be left floating
control pin for external wake biasing transistor
current measurement for external PNP transistor; this pin is connected to
the collector of the external PNP transistor
test pin; pin should be connected to ground
control pin of the external PNP transistor; this pin is connected to the base
of the external PNP transistor
battery supply for the SBC
Rev. 02 — 27 May 2010
…continued
High-speed CAN core system basis chip
UJA1076
© NXP B.V. 2010. All rights reserved.
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