MFRC52201HN1,157 NXP Semiconductors, MFRC52201HN1,157 Datasheet - Page 27

• Manufacturer Part Number: MFRC52201HN1,157
• Description: IC SMART CARD READER
• Manufacturer: NXP Semiconductors

Specifications of MFRC52201HN1,157

• Controller Type: Smart Card Interface
• Interface: SPI
• Voltage - Supply: 1.6 V ~ 3.6 V
• Current - Supply: 60mA
• Operating Temperature: -25°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935280547157; MFRC52201HN1; MFRC52201HN1

NXP Semiconductors
112132
Product data sheet
9.2.2.5 TxControlReg
Table 46:
Controls the logical behavior of the antenna driver pins Tx1 and Tx2.
Table 47:
Table 48:
Bit
3
2
1 to 0
Bit
7
6
5
4
3
2
1
0
Symbol
Access
Rights
Bit
InvTx2RF
Symbol
RxNoErr
RxMultiple
-
Symbol
InvTx2RFOn
InvTx1RFOn
InvTx2RFOff
InvTx1RFOff
Tx2CW
-
Tx2RFEn
Tx1RFEn
Description of RxModeReg bits
Description of TxControlReg bits
TxControlReg register (address 14h); reset value: 80h
On
r/w
7
InvTx1RF
Rev. 3.2 — 22 May 2007
r/w
Description
If set to logic 1, a not valid received data stream (less than 4 bits
received) will be ignored. The receiver will remain active.
Set to logic 0, the receiver is deactivated after receiving a data frame.
Set to logic 1, it is possible to receive more than one data frame. This bit
is only valid for data rates above 106 kbit/s to handle the Polling
command. Having set this bit, the receive and transceive commands will
not terminate automatically. In this case the multiple receiving can only
be deactivated by writing any command (except the Receive command)
to the CommandReg register or by clearing the bit by the host.
If set to logic 1, at the end of a received data stream an error byte is
added to the FIFO. The error byte is a copy of the ErrorReg register.
Reserved for future use.
On
6
Description
Set to logic 1, the output signal at pin TX2 will be inverted, if driver TX2
is enabled.
Set to logic 1, the output signal at pin TX1 will be inverted, if driver TX1
is enabled.
Set to logic 1, the output signal at pin TX2 will be inverted, if driver TX2
is disabled.
Set to logic 1, the output signal at pin TX1 will be inverted, if driver TX1
is disabled.
Set to logic 1, the output signal on pin TX2 will deliver continuously the
un-modulated 13.56 MHz energy carrier.
Set to logic 0, Tx2CW is enabled to modulate the 13.56 MHz energy
carrier.
Reserved for future use.
Set to logic 1, the output signal on pin TX2 will deliver the 13.56 MHz
energy carrier modulated by the transmission data.
Set to logic 1, the output signal on pin TX1 will deliver the 13.56 MHz
energy carrier modulated by the transmission data.
InvTx2RF
r/w
Off
5
…continued
InvTx1RF
Off
r/w
4
Tx2CW
r/w
3
RFU
2
-
Contactless Reader IC
MFRC522
Tx2RFEn Tx1RFEn
© NXP B.V. 2007. All rights reserved.
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