DS21Q42T Maxim Integrated Products, DS21Q42T Datasheet - Page 55

IC FRAMER ENHANCED T1 4X 128TQFP

DS21Q42T

Manufacturer Part Number
DS21Q42T
Description
IC FRAMER ENHANCED T1 4X 128TQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21Q42T

Controller Type
T1 Framer
Interface
Parallel/Serial
Voltage - Supply
2.97 V ~ 3.63 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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11.1.2 Per-Channel Code Insertion
The second method involves using the Transmit Channel Control Registers (TCC1/2/3) to determine
which of the 24 T1 channels should be overwritten with the code placed in the Transmit Channel
Registers (TC1 to TC24). This method is more flexible than the first in that it allows a different 8–bit
code to be placed into each of the 24 T1 channels.
TC1 TO TC24: TRANSMIT CHANNEL REGISTERS
(Address=40 to 4F and 50 to 57 Hex)
(for brevity, only channel one is shown; see Table 4-1 for other register address)
TCC1/TCC2/TCC3: TRANSMIT CHANNEL CONTROL REGISTER
(Address=16 to 18 Hex)
11.2 Receive Side Code Generation
In the receive direction there are also two methods by which channel data to the backplane can be
overwritten with data generated by the framer. The first method which is covered in Section 11.2.1 was a
feature contained in the original DS21Q41 while the second method which is covered in Section 11.2.2 is
a new feature of the DS21Q42.
11.2.1 Simple Code Insertion
The first method on the receive side involves using the Receive Mark Registers (RMR1/2/3) to determine
which of the 24 T1 channels should be overwritten with either a 7Fh idle code or with a digital milliwatt
pattern. The RCR2.7 bit will determine which code is used. The digital milliwatt code is an eight byte
repeating pattern that represents a 1 kHz sine wave (1E/0B/0B/1E/9E/8B/8B/9E). Each bit in the RMRs,
represents a particular channel. If a bit is set to a one, then the receive data in that channel will be
replaced with one of the two codes. If a bit is set to zero, no replacement occurs.
(MSB)
(MSB)
CH16
CH24
CH8
C7
SYMBOL
SYMBOL
CH1 – 24
C7
C0
CH15
CH23
CH7
C6
CH14
CH22
CH6
C5
TCC1.0 - 3.7
POSITION
POSITION
TC1.7
TC1.0
CH13
CH21
CH5
C4
NAME AND DESCRIPTION
MSB of the Code (this bit is transmitted first)
LSB of the Code (this bit is transmitted last)
NAME AND DESCRIPTION
Transmit Code Insertion Control Bits
0 = do not insert data from the TC register into the transmit
data stream
1 = insert data from the TC register into the transmit data
stream
CH12
CH20
CH4
C3
55 of 116
CH11
CH19
CH3
C2
CH10
CH18
CH2
C1
(LSB)
(LSB)
CH17
CH1
CH9
C0
TCC1 (16)
TCC2 (17)
TCC3 (18)
TC1 (50)

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