DS3148N Maxim Integrated Products, DS3148N Datasheet - Page 2
![IC 8CH DS3/3 FRAMER 349-BGA](/photos/6/82/68292/349-bga_21-0316_sml.jpg)
DS3148N
Manufacturer Part Number
DS3148N
Description
IC 8CH DS3/3 FRAMER 349-BGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3148.pdf
(89 pages)
Specifications of DS3148N
Controller Type
DS3/E3 Framer
Interface
LIU
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
640mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
349-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
1.
2.
3.
4.
5.
6.
7.
5.1
5.2
5.3
5.4
5.5
5.6
5.7
6.1
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.2.1
7.2.2
7.5.1
7.5.2
7.5.3
7.5.4
7.6.1
7.10.1
7.10.2
BLOCK DIAGRAM .......................................................................................................................... 6
APPLICATION EXAMPLE .............................................................................................................. 6
MAIN FEATURES ........................................................................................................................... 7
STANDARDS COMPLIANCE ......................................................................................................... 8
PIN DESCRIPTION ......................................................................................................................... 9
REGISTERS.................................................................................................................................. 15
FUNCTIONAL DESCRIPTION ...................................................................................................... 18
T
R
T
R
CPU B
JTAG I
S
S
P
T
R
E
L
C
DS3/E3 F
DS3/E3 P
BERT........................................................................................................................................ 46
OOPBACKS
RANSMIT
RANSMIT
RANSMITTER
UPPLY
TATUS
IN
RROR
ECEIVE
ECEIVE
ECEIVER
OMMON AND
HDLC C
FEAC C
I
Transmit Clock ..................................................................................................................................... 18
Loss-of-Clock Detection ....................................................................................................................... 19
Line Loopback...................................................................................................................................... 20
Diagnostic Loopback............................................................................................................................ 20
Payload Loopback................................................................................................................................ 20
BERT and Loopback Interaction .......................................................................................................... 20
Master Status Register (MSR) ............................................................................................................. 29
Receive Operation ............................................................................................................................... 54
Transmit Operation .............................................................................................................................. 55
NVERSIONS AND
US
NTERFACE
I
, T
R
NSERTION
F
F
EGISTER
RAMER
ERFORMANCE
I
F
F
EST
L
RAMER
RAMER
ONTROLLER
ONTROLLER
NTERFACE
OGIC
ORMATTER
ORMATTER
............................................................................................................................... 20
,
L
L
AND
OGIC
INE
........................................................................................................................ 19
....................................................................................................................... 33
LIU I
S
P
...................................................................................................................... 20
D
I
YSTEM
INS
NTERFACE
R
ESCRIPTION
F
D
P
ESET
ORCE
ESCRIPTION
............................................................................................................... 14
............................................................................................................... 54
............................................................................................................... 63
NTERFACE
LIU I
S
INS
E
YSTEM
RROR
I
......................................................................................................... 14
P
NTERFACE
NTERFACE
H
INS
IGH
TABLE OF CONTENTS
R
I
................................................................................................. 14
C
NTERFACE
EGISTERS
................................................................................................ 17
/L
P
OUNTERS
............................................................................................. 18
INS
OW
P
......................................................................................... 9
P
...................................................................................... 18
INS
INS
2 of 89
................................................................................. 22
P
................................................................................ 12
................................................................................ 43
................................................................................. 9
INS
........................................................................ 10