ISP1161ABD-T ST-Ericsson Inc, ISP1161ABD-T Datasheet - Page 15
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ISP1161ABD-T
Manufacturer Part Number
ISP1161ABD-T
Description
IC USB HOST CTRL FULL-SPD 64LQFP
Manufacturer
ST-Ericsson Inc
Datasheet
1.ISP1161ABD.pdf
(135 pages)
Specifications of ISP1161ABD-T
Controller Type
USB 2.0 Controller
Interface
Parallel
Voltage - Supply
3.3V, 5V
Current - Supply
47mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ISP1161ABD-T
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
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Philips Semiconductors
9397 750 13962
Product data
8.3.2 Register access phases
Figure 10
ISP1161A internal control registers.
The ISP1161A register structure is a command-data register pair structure. A
complete register access cycle comprises a command phase followed by a data
phase. The command (also known as the index of a register) points the ISP1161A to
the next register to be accessed. A command is 8 bits long. On a microprocessor’s
16-bit data bus, a command occupies the lower byte, with the upper byte filled with
zeros.
Figure 12
microprocessor writes a command code to the command port, and then reads or
writes the data word from or to the data port. Take the example of a microprocessor
attempting to read the ISP1161A’s ID. The ID is kept in the HC’s HcChipID register
(index 27H, read only). The 16-bit register access cycle is therefore:
1. Microprocessor writes the command code of 27H (0027H in 16-bit width) to the
2. Microprocessor reads the data word of the chip’s ID from the HC data port.
Fig 10. A microprocessor accessing an HC or a DC via an automux switch.
Fig 11. A microprocessor accessing internal control registers.
HC command port
When A1 = 0, the microprocessor accesses the HC.
When A1 = 1, the microprocessor accesses the DC.
When A0 = 0, the microprocessor accesses the data port.
When A0 = 1, the microprocessor accesses the command port.
and
shows a complete 16-bit register access cycle for the ISP1161A. The
Figure 11
Host or Device
Rev. 03 — 23 December 2004
bus I/F
A0
illustrate how an external microprocessor accesses the
CMD/DATA
Full-speed USB single-chip host and device controller
SWITCH
µP bus I/F
1
0
A1
command port
data port
AUTOMUX
DC/HC
0
1
Control registers
Device bus I/F
Host bus I/F
. .
.
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
MGT935
Command register
Commands
ISP1161A
MGT936
14 of 134
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