ISP1161ABD-T ST-Ericsson Inc, ISP1161ABD-T Datasheet - Page 9
![no-image](/images/manufacturer_photos/0/6/627/st-ericsson_inc_sml.jpg)
ISP1161ABD-T
Manufacturer Part Number
ISP1161ABD-T
Description
IC USB HOST CTRL FULL-SPD 64LQFP
Manufacturer
ST-Ericsson Inc
Datasheet
1.ISP1161ABD.pdf
(135 pages)
Specifications of ISP1161ABD-T
Controller Type
USB 2.0 Controller
Interface
Parallel
Voltage - Supply
3.3V, 5V
Current - Supply
47mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ISP1161ABD-T
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
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Philips Semiconductors
9397 750 13962
Product data
Table 2:
Symbol
D6
D7
DGND
D8
D9
D10
D11
D12
D13
DGND
D14
D15
DGND
V
n.c.
CS
RD
WR
V
DREQ1
DREQ2
DACK1
hold1
hold2
[1]
Pin description for LQFP64
Pin
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
Rev. 03 — 23 December 2004
Type
I/O
I/O
-
I/O
I/O
I/O
I/O
I/O
I/O
-
I/O
I/O
-
-
-
I
I
I
-
O
O
I
Full-speed USB single-chip host and device controller
Description
bit 6 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 7 of bidirectional data; slew-rate controlled; TTL input;
three-state output
digital ground
bit 8 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 9 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 10 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 11 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 12 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 13 of bidirectional data; slew-rate controlled; TTL input;
three-state output
digital ground
bit 14 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 15 of bidirectional data; slew-rate controlled; TTL input;
three-state output
digital ground
voltage holding pin; internally connected to the V
V
output 3.3 V, hence do not connect it to 5 V. When V
connected to 3.3 V, this pin can either be connected to
3.3 V or left unconnected. In all cases, decouple this pin to
DGND.
no connection
chip select input
read strobe input
write strobe input
voltage holding pin; internally connected to the V
V
output 3.3 V, hence do not connect it to 5 V. When V
connected to 3.3 V, this pin can either be connected to
3.3 V or left unconnected. In all cases, decouple this pin to
DGND.
HC DMA request output (programmable polarity); signals
to the DMA controller that the ISP1161A wants to start a
DMA transfer; see
DC DMA request output (programmable polarity); signals
to the DMA controller that the ISP1161A wants to start a
DMA transfer; see
HC DMA acknowledge input; when not in use, this pin must
be connected to V
hold2
hold1
pins. When V
pins. When V
…continued
CC
Section 10.4.1
Section 13.1.4
CC
CC
via an external 10 kΩ resistor
is connected to 5 V, this pin will
is connected to 5 V, this pin will
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1161A
reg(3.3)
reg(3.3)
CC
CC
8 of 134
and
and
is
is
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