S-8233AKFT-TB-G Seiko Instruments, S-8233AKFT-TB-G Datasheet - Page 18

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S-8233AKFT-TB-G

Manufacturer Part Number
S-8233AKFT-TB-G
Description
Battery Management Lithium-Ion battery protection (3 cell)
Manufacturer
Seiko Instruments
Datasheet

Specifications of S-8233AKFT-TB-G

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
S-8233AKFT-TB-G
Manufacturer:
SEIKO
Quantity:
512
18
BATTERY PROTECTION IC FOR 3-SERIAL-CELL PACK
S-8233A Series
Battery Protection IC Connection Example
[Description of Figure 9]
Battery 1
Battery 3
Battery 2
R6 is a pull-up resistor that turns FET-B off when the COP pin is opened. Connect a 100 kΩ to 1 MΩ
less. If overdischarge is inhibited by using this FET, the current consumption does not fall below 0.1
The overcharge detection delay time (t
R5 is used to protect the IC if the charger is connected in reverse. Connect a 10 kΩ to 50 kΩ
R11, R12, and R13 are used to adjust the battery conditioning current.The conditioning current
during overcharge detection is given by Vcu (overcharge detection voltage)/R (R: resistance).To
disable the conditioning function, open CD1, CD2, and CD3.
and overcurrent detection delay time (t
electrical characteristics.
resistor.
resistor.
If capacitor C6 is absent, rush current occurs when a capacitive load is connected and the IC enters
If capacitor C5 is not connected, the IC may enter the overdischarge status due to variations of
If a leak current flows between the delay capacitor connection pin (CCT, CDT, or COVT) and VSS,
Overdischarge detection can be disabled by using FET-C. The FET-C off leak must be 0.1 μA or
μA even when the battery voltage drops and the IC enters the overdischarge detection mode.
R1, R2, and R3 must be 1 kΩ or less.
R7 is the protection of the CTL when the CTL pin voltage higher than V
to 5 kΩ resister. If the CTL pin voltage never greater than the V
without R7 resistance is allowed .
the overcurrent mode. C6 must be connected to prevent it.
battery voltage when the overcurrent occurs. In this case, a charger must be connected to return to
the normal status. To prevent this, connect an at least 0.01 μF capacitor to C5.
the delay time increases and an error occurs. The leak current must be 100 nA or less.
R12
R13
R11
R1
R2
R3
C3
C2
C1
FET1
FET2
FET3
FET-A
VCC
CD1
VC1
CD2
VC2
CD3
VSS
Seiko Instruments Inc.
DOP
IOV1
CU1
) are changed with external capacitors (C4 to C6). See the
Figure 9
FET-B
S-8233A series
to t
Nch open
drain
CU3
), overdischarge detection delay time (t
COP
R6
1 MΩ
COVT
CC
CCT
CTL
CDT
VMP
10 KΩ
voltage (ex. R7 connect to V
R5
C4
CC
C5
C6
GND: Normal operation
Floating: Inhibit charging
and discharging.
R7
voltage. Connect a 300 Ω
Overcharge delay
time setting
Overdischarge delay
time setting
Overcurrent delay
time setting
1 KΩ
EB+
EB-
High: Inhibit over
FET-C
discharge
detection.
Rev.6.0
DD1
to t
SS
),
DD3
_00
),

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