78M6612-IMR/F/PD2 Maxim Integrated Products, 78M6612-IMR/F/PD2 Datasheet - Page 36
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78M6612-IMR/F/PD2
Manufacturer Part Number
78M6612-IMR/F/PD2
Description
Current & Power Monitors & Regulators 2 Out Sgl Phase Pwr & Energy Msrmt IC
Manufacturer
Maxim Integrated Products
Datasheet
1.78M6612-IMF.pdf
(111 pages)
Specifications of 78M6612-IMR/F/PD2
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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78M6612 Data Sheet
SFR (special function register) enable bits must be set to permit any of these interrupts to occur.
Likewise, each interrupt has its own flag bit that is set by the interrupt hardware and is reset automatically
by the MPU interrupt handler (0 through 5). XFER_BUSY and RTC_1SEC
have their own enable and flag bits in addition to the interrupt 6 enable and flag bits, and these interrupts
must be cleared by the MPU software.
1.4.9.3 Interrupt Priority Level Structure
All interrupt sources are combined in groups, as shown in
Each group of interrupt sources can be programmed individually to one of four priority levels by setting or
clearing one bit in the special function register IP0 and one in IP1. If requests of the same priority level
are received simultaneously, an internal polling sequence as per
serviced first.
Figure 6
IEN enable bits must be set to permit any of these interrupts to occur. Likewise, each interrupt has its
own flag bit that is set by the interrupt hardware and is reset automatically by the MPU interrupt handler
(0 through 5). XFER_BUSY and RTC_1SEC, which are OR-ed together, have their own enable and flag
bits in addition to the interrupt 6 enable and flag bits and these interrupts must be cleared by the MPU
software.
36
gives an overview of the interrupt structure.
Group
0
1
2
3
4
5
Serial channel 0 interrupt
External interrupt 0
External interrupt 1
Timer 0 interrupt
Timer 1 interrupt
–
Table 32: Priority Level Groups
Serial channel 1 interrupt
Table
–
–
–
–
–
32.
Table 36
, which are OR-ed together,
determines which request is
External interrupt 2
External interrupt 3
External interrupt 4
External interrupt 5
External interrupt 6
DS_6612_001
Rev. 1.2
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