78M6612-IMR/F/PD2 Maxim Integrated Products, 78M6612-IMR/F/PD2 Datasheet - Page 75
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78M6612-IMR/F/PD2
Manufacturer Part Number
78M6612-IMR/F/PD2
Description
Current & Power Monitors & Regulators 2 Out Sgl Phase Pwr & Energy Msrmt IC
Manufacturer
Maxim Integrated Products
Datasheet
1.78M6612-IMF.pdf
(111 pages)
Specifications of 78M6612-IMR/F/PD2
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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DS_6612_001
4.2 SFR Map (SFRs Specific to Teridian 80515)
‘
are in use and should not be changed. This table lists only the SFR registers that are not generic 8051
SFR registers.
Rev. 1.2
Not Used’ bits are blacked out and contain no memory and are read by the MPU as zero. Reserved bits
* = Only available on QFN-68 package. Reserved in the LQFP-64 package.
Digital I/O:
Interrupts and WD Timer:
Flash:
Serial EEPROM:
LCD_BLNK 205A
FLSHCTL
* = Only available on QFN-68 package. Reserved in the LQFP-64 package.
RTM Probes:
Pulse Generator:
EEDATA
EECTRL
INTBITS
PLS_W PLS_
IFLAGS
ERASE
LCD19
LCD24
LCD38
DIO10
DIO11
DIO12
RTM0
RTM1
RTM2
RTM3
PLS_I PLS_I
Name
FPAG
DIO7
DIO8
DIO9
…
…
RTM0
RTM1
RTM2
RTM3
2043
2048
2056
SFR
…
…
W
80
A2
90
91
A0
A1
F8
E8
94
B2
B7
9E
9F
IE_PLLFALL
PREBOOT
Not Used
Not Used
WD_RST
Bit 7
DIO_DIR1[7:6]
DIO_1[7:6]
IE_PLLRISE IE_WAKE
Not Used DIO_2[5]
Not Used
LCD_BLKMAP19[3:0]
Table 49: SFR Map – In Numerical Order
SECURE
DIO_0[7:4] (Port 0)
Bit 6
INT6
DIO_DIR0[7:4]
Not Used
Not Used
Not Used
Not Used
Not Used
PLS_W
PLS_I
RTM0
RTM1
RTM2
RTM3
DIO_DIR2
Not Used
Bit 5
INT5
[5]
*
Reserved
Reserved
FLSH_PGADR[6:0]
*
Reserved IE_FWCOL1 IE_FWCOL0
Not Used
Bit 4
INT4
FLSH_ERASE[7:0]
DIO_DIR2[4:3]
EEDATA[7:0]
EECTRL[7:0]
DIO_2[4:3]
DIO_0[3]*
DIO_DIR0
Not Used
Bit 3
INT3
[3]*
Reserved
Reserved
Not Used
LCD_BLKMAP18[3:0]
DIO_1[3:0] (Port 1)
Bit 2
INT2
DIO_DIR0[2:1]
LCD_SEG19[3:0]
LCD_SEG24[3:0]
LCD_SEG38[3:0]
DIO_DIR1[3:0]
DIO_0[2:1]
PLS_W
78M6612 Data Sheet
RTM0
RTM1
RTM2
RTM3
PLS_I
…
…
FLSH_MEEN
IE_RTC
DIO_2[1:0] (Port 2)
Bit 1
INT1
DIO_DIR2[1:0]
FLSH_PWE
Reserved
Reserved
Not Used
IE_XFER
Bit 0
INT0
75
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