CY7C63913-PXC Cypress Semiconductor Corp, CY7C63913-PXC Datasheet - Page 38

• Manufacturer Part Number: CY7C63913-PXC
• Description: IC USB PERIPHERAL CTRLR 40-DIP
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C63913-PXC

• Controller Type: USB Peripheral Controller
• Interface: USB
• Voltage - Supply: 4 V ~ 5.5 V
• Current - Supply: 40mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.600", 15.24mm)
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: MDIP
• Mounting: Through Hole
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY4623 - KIT MOUSE REFERENCE DESIGN428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

Document 38-08035 Rev. *E
16.1.4
Table 16-4. Timer Capture 1 Rising (TCAP1R) [0x23] [R/W]
16.1.5
Table 16-5. Timer Capture 0 Falling (TCAP0F) [0x24] [R/W]
16.1.6
Table 16-6. Timer Capture 1 Falling (TCAP1F) [0x25] [R/W]
16.1.7
Table 16-7. Programmable Interval Timer Low (PITMRL) [0x26] [R/W]
Bit [7:0]: Capture 1 Rising [7:0]
This register holds the value of the Free-running Timer when the last rising edge occurred on the TCAP1 input. The bits that are
stored here are selected by the Prescale [2:0] bits in the Timer Configuration register. When Capture 0 is in 16-bit mode this
register holds the high-order 8 bits of the 16-bit timer from the last Capture 0 rising edge. When Capture 0 is in 16-bit mode this
register will be loaded with high-order 8 bits of the 16-bit timer on TCAP0 rising edge
Bit [7:0]: Capture 0 Falling [7:0]
This register holds the value of the Free-running Timer when the last falling edge occurred on the TCAP0 input. When Capture
0 is in 8-bit mode, the bits that are stored here are selected by the Prescale [2:0] bits in the Timer Configuration register. When
Capture 0 is in 16-bit mode this register holds the lower-order 8 bits of the 16-bit timer
Bit [7:0]: Capture 1Falling [7:0]
This register holds the value of the Free-running Timer when the last falling edge occurred on the TCAP1 input. The bits that
are stored here are selected by the Prescale [2:0] bits in the Timer Configuration register. When capture 0 is in 16-bit mode this
register holds the high-order 8 bits of the 16-bit timer from the last Capture 0 falling edge. When Capture 0 is in 16-bit mode this
register will be loaded with high-order 8 bits of the 16-bit timer on TCAP0 falling edge
Bit [7:0]: Prog Interval Timer [7:0]
This register holds the low-order byte of the 12-bit programmable interval timer. Reading this register causes the high-order byte
to be moved into a holding register allowing an automatic read of all 12 bits simultaneously
Read/Write
Read/Write
Read/Write
Read/Write
Default
Default
Default
Default
Field
Field
Field
Field
Bit #
Bit #
Bit #
Bit #
Capture 1 Rising
Timer Capture 0 Falling
Timer Capture 1 Falling
Programmable Interval Low Byte
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
Prog Interval Timer [7:0]
R/W
Capture 0 Falling [7:0]
R/W
Capture 1 Falling [7:0]
R/W
R/W
Capture 1 Rising [7:0]
4
0
4
0
4
0
4
0
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
CY7C63310
CY7C638xx
CY7C639xx
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R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0