DP83950BVQB National Semiconductor, DP83950BVQB Datasheet - Page 37

• Manufacturer Part Number: DP83950BVQB
• Description: IC CTRLR RIC REPEATER 160-PQFP
• Manufacturer: National Semiconductor

Specifications of DP83950BVQB

• Controller Type: Ethernet Repeater Interface Controller
• Interface: IEEE 802.3
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 380mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-MQFP, 160-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83950BVQB

Name
5 0 Functional Description
Pin
D0
D1
D2
D3
D4
D5
D6
D7
Programming
MIN MAX
Function
TXONLY
LPPART
DPART
CCLIM
OWCE
resv
tw2
TABLE 5 1 Pin Definitions for Options in the Mode Load Operation
Not Permitted
Effect When
Minimum
Selected
Selected
Selected
Selected
Bit is 0
Mode
5 bits
63
(Continued)
Effect When
Not Selected
Not Selected
Not Selected
Not Selected
Maximum
Required
Bit is 1
Mode
3 bits
31
37
To ensure correct device operation this bit must be written with a
logic one during the mode load operation
This allows the user to select one of two values for the repeater
specification tw2 time The lower limit (3 bits) meets the IEEE
specification The upper limit (5 bits) is not specification
compliant but may provide users with higher network throughput
by avoiding spurious network activity gaps when using coaxial
(10BASE2 10BASE5) network segments
The partition specification requires a port to be partitioned after a
certain number of consecutive collisions The RIC has two values
available to allow users to customize the partitioning algorithm to
their environment Please refer to the Partition State Machine in
data sheet Section 7 3
The RIC may be configured to partition a port if the segment
transceiver does not loopback data to the port when the port is
transmitting to it as described in the Partition State Machine
This configuration bit allows the on-chip partition algorithm to
include out of window collisions into the collisions it monitors as
described in the Partition State Machine
This configuration bit allows the on-chip partition algorithm to
restrict segment reconnection as described in the Partition State
Machine
The Partition state machines for all ports may be disabled by
writing a logic zero to this bit during the mode load operation
The operation of the display update block is controlled by the
value of this configuration bit as described in the Display Update
Cycles section
Function