DP83950BVQB National Semiconductor, DP83950BVQB Datasheet - Page 46

IC CTRLR RIC REPEATER 160-PQFP

DP83950BVQB

Manufacturer Part Number
DP83950BVQB
Description
IC CTRLR RIC REPEATER 160-PQFP
Manufacturer
National Semiconductor
Datasheet

Specifications of DP83950BVQB

Controller Type
Ethernet Repeater Interface Controller
Interface
IEEE 802.3
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
380mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
160-MQFP, 160-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*DP83950BVQB

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6 0 Hub Management Support
providing information of six different types They are held in
seven Packet Status Registers ‘‘PSRs’’
1 The RIC and port address fields PSR(0) and (1) can
2 The status flags the RIC produces for the event counters
3 The RIC has an on-chip timer to indicate when relative to
4 If packet compression is employed the receive byte
Note These registers may only be reliably accessed via the management interface Due to the nature of these registers they may not be accessed (read or write
cycles) via the processor interface
Packet Status
PSR(0)
PSR(1)
PSR(2)
PSR(3)
Collision Bit
Timer
PSR(4)
Lower Repeat
Byte Count
PSR(5)
Upper Repeat
Byte Count
PSR(6)
Inter Frame
Gap Bit Timer
Register PSR
uniquely identify the repeater port receiving the packet
out of a potential maximum of 832 ports sharing the same
management bus (64 RICs each with 13 ports) Thus all
of the other status fields can be correctly attributed to the
relevant port
or recording latches are supplied with each packet
supplied to allow the user to determine the reliability of
the address fields in the packet The CLN status bit
repetition of the address fields
the start of packet repetition a collision if any occurred
bit times of IFG was seen on the network between repeti-
tion of this packet and the preceding one This is provid-
ed by PSR(6)
count contained in the SONIC’s packet descriptor will in-
dicate the number of bytes transferred over the manage-
ment bus rather than the number of bytes in the packet
For this reason the RIC which receives the packet
PSR(2)
PSR(1) is set if no collisions are experienced during the
PSR(3) There is also a timer which indicates how many
Additionally the clean receive CLN status is
CRCER
RBY15
RBY7
CBT7
IBT7
D7
A5
SE
RBY14
CBT6
RBY6
OWC
IBT6
FAE
D6
A4
FIGURE 6 1 Hub Management Status Field
RBY13
NSFD
CBT5
RBY5
IBT5
(Continued)
COL
D5
A3
46
RBY12
PLER
CBT4
RBY4
IBT4
CLN
D4
A2
Figure 6 2 shows an example of a packet being transmitted
counts the number of received bytes and transfers this over
the management bus PSR(4) (5)
5 Appending a status field to a data packet will obviously
6 As a final check upon the effectiveness of the manage-
over the management bus The first section of the diagram
(moving from left to right) shows a short preamble and SFD
pattern The second region contains the packet’s address
and the start of the data fields During this time logic on the
processor SONIC card would determine if packet compres-
sion should be used on this packet The PCOMP signal is
asserted and packet transfer stops when the number of
bytes transmitted equals the value defined in the decode
register Hence the MRXC signal is idle for the remainder of
the packet’s data and CRC fields The final region shows
the transfer of the RIC’s seven bytes of packet status
The following pages describe these Hub Management regis-
ters which constitute the management status field
result in a CRC error being flagged by the SONIC For this
reason the RIC monitors the repeated data stream to
check for CRC and FAE errors In the case of FAE errors
the RIC provides additional dummy data bits so that the
status fields are always byte aligned
ment interface the RIC transfers a bus specific status bit
to the SONIC This flag Packet Compress Done PCOMPD
ware to check if the packet compression operation is en-
abled
PSR(0)
ELBER
RBY11
CBT3
RBY3
IBT3
PA3
D3
A1
may be monitored by hub management soft-
RBY10
RBY2
CBT2
IBT2
PA2
JAB
D2
A0
PCOMPD
CBT1
RBY1
RBY9
CBT9
IBT1
PA1
D1
TXCOL
CBT8
CBT0
RBY0
RBY8
IBT0
PA0
D0

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