DP83820BVUW National Semiconductor, DP83820BVUW Datasheet - Page 63

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DP83820BVUW

Manufacturer Part Number
DP83820BVUW
Description
IC INTERFACE CONTROLLER 208-PQFP
Manufacturer
National Semiconductor
Datasheet

Specifications of DP83820BVUW

Controller Type
Ethernet Controller, MAC/BIU
Interface
IEEE 802.3
Voltage - Supply
3.3V
Current - Supply
150mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
208-MQFP, 208-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*DP83820BVUW

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4.0 Register Set
4.2.26 Management Information Base Control Register
The MIBC register is used to control access to the statistics block and the warning bits and to control the collection of
management information statistics.
31-4
bit
3
2
1
0
ACLR
MIBS
WRN
FRZ
tag
Offset: 005ch
(Continued)
Tag: MIBC
MIB Counter Strobe
Clear all counters
Freeze all counters
Warning Test Indicator
description
Access: Read Write
unused
Writing a 1 to this bit location causes the counters in all enabled blocks to
increment by 1, providing a single-step test function. The MIBS bit is always
read back as 0. This bit is used for test purposes only and should be
set to 0 for normal counter operation.
When set to a 1, this bit forces all counters to be reset to 0. This bit is
always read back as 0.
When set to a 1, this bit forces count values to be frozen such that a read of
the statistic block will represent management statistics at a given instant in
time. When set to 0, the counters will increment normally and may be read
individually while counting.
This field is read only. This bit is set to 1 when all statistic counters have
reached their respective overflow warning condition. WRN will be cleared
after one or more of the statistic counters have been cleared.
Size: 32 bits
63
usage
Hard Reset: 00000002h
Soft Reset: 00000002h
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