KSZ8721B Micrel Inc, KSZ8721B Datasheet - Page 26

IC TXRX PHY 10/100 2.5V 48-SSOP

KSZ8721B

Manufacturer Part Number
KSZ8721B
Description
IC TXRX PHY 10/100 2.5V 48-SSOP
Manufacturer
Micrel Inc
Type
Transceiverr
Datasheets

Specifications of KSZ8721B

Number Of Drivers/receivers
1/1
Protocol
MII, RMII
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Package / Case
48-SSOP
Data Rate
100Mbps
Supply Voltage Range
2.375V To 2.625V
Logic Case Style
SSOP
No. Of Pins
48
Operating Temperature Range
0°C To +70°C
Msl
MSL 2 - 1 Year
Ic Function
Transceiver IC
Termination Type
SMD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1627 - BOARD EVALUATION FOR KSZ8721BMC576-1626 - BOARD EVALUATION FOR KSZ8721BL
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-1026-5
576-1510-5
576-1510-5
KSZ8721B

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Symbol
Symbol
t
t
t
t
t
t
t
t
M9999-030106
P
WL
WL
WL
WH
SU
HD
RLAT
CRS1
CRS2
Parameter
Parameter
RXC Period
RXC Period
RXC Period
RXC Period
RXC Period
RXC Period
RXC Pulse Width
RXC Pulse Width
RXC Pulse Width
RXC Pulse Width
RXC Pulse Width
RXC Pulse Width
RXC Pulse Width
RXC Pulse Width
RXC Pulse Width
RXC Pulse Width
RXC Pulse Width
RXC Pulse Width
RXC Pulse Width
RXD [3:0], RXER, RXDV Set-Up to Rising Edge of RXC
RXD [3:0], RXER, RXDV Set-Up to Rising Edge of RXC
RXD [3:0], RXER, RXDV Set-Up to Rising Edge of RXC
RXD [3:0], RXER, RXDV Set-Up to Rising Edge of RXC
RXD [3:0], RXER, RXDV Set-Up to Rising Edge of RXC
RXD [3:0], RXER, RXDV Set-Up to Rising Edge of RXC
RXD [3:0], RXER, RXDV Hold from Rising Edge of RXC
RXD [3:0], RXER, RXDV Hold from Rising Edge of RXC
RXD [3:0], RXER, RXDV Hold from Rising Edge of RXC
RXD [3:0], RXER, RXDV Hold from Rising Edge of RXC
RXD [3:0], RXER, RXDV Hold from Rising Edge of RXC
RXD [3:0], RXER, RXDV Hold from Rising Edge of RXC
CRS to RXD Latency, 4B or 5B Aligned
CRS to RXD Latency, 4B or 5B Aligned
CRS to RXD Latency, 4B or 5B Aligned
CRS to RXD Latency, 4B or 5B Aligned
CRS to RXD Latency, 4B or 5B Aligned
CRS to RXD Latency, 4B or 5B Aligned
“Start of Stream” to CSR Asserted
“Start of Stream” to CSR Asserted
“Start of Stream” to CSR Asserted
“Start of Stream” to CSR Asserted
“Start of Stream” to CSR Asserted
“Start of Stream” to CSR Asserted
“End of Stream” to CSR De-Asserted
“End of Stream” to CSR De-Asserted
“End of Stream” to CSR De-Asserted
“End of Stream” to CSR De-Asserted
“End of Stream” to CSR De-Asserted
“End of Stream” to CSR De-Asserted
RX+/RX-
CRS
RXDV
RXD[3:0]
RXER
RXC
Table 4. 100BaseT MII Receive Timing Parameters
Start of
Stream
Figure 6. 100BaseT MII Receivce Timing
t
CRS1
t
RLAT
t
SU
26
t
HD
End of
Stream
t
WL
t
t
t
P
CRS 2
WH
Min
Min
Min
Min
106
106
106
106
106
106
154
154
154
154
154
154
20
20
20
20
20
20
20
20
20
20
20
20
20
Typ
Typ
Typ
Typ
40
40
40
40
40
40
20
20
20
20
20
20
20
20
20
20
20
20
6
6
6
6
6
6
Max
Max
Max
Max
138
138
138
138
138
138
186
186
186
186
186
186
March 2006
Units
Units
Units
Units
BT
BT
BT
BT
BT
BT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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