ICS1893CKILF IDT, Integrated Device Technology Inc, ICS1893CKILF Datasheet - Page 92

PHYCEIVER LOW PWR 3.3V 56-MLF2

ICS1893CKILF

Manufacturer Part Number
ICS1893CKILF
Description
PHYCEIVER LOW PWR 3.3V 56-MLF2
Manufacturer
IDT, Integrated Device Technology Inc
Series
PHYceiver™r
Type
PHY Transceiverr
Datasheet

Specifications of ICS1893CKILF

Protocol
MII
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
56-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
1893CKILF
800-1023

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ICS1893CF, Rev. K, 05/13/10
Table 8-7. MAC Interface Pins: Media Independent Interface (MII) (Continued)
RXD0
RXD1
RXD2
RXD3
RXDV
RXER
TXCLK
Name
Pin
ICS1893CF Data Sheet - Release
Number
Pin
31
30
29
28
32
35
37
Output
Output
Output
Output
Type
Pin
Copyright © 2009, Integrated Device Technology, Inc.
Receive Data 0–3.
Receive Data Valid.
The ICS1893CF asserts RXDV to indicate to the MAC that data is
available on the MII Receive Bus (RXD[3:0]). The ICS1893CF:
Receive Error.
When the MAC Interface is in:
Transmit Clock.
The ICS1893CF generates this clock signal to synchronize the transfer of
data from the MAC Interface to the ICS1893CF. When the mode is:
Note: RXDV is synchronous with the Receive Data Clock, RXCLK.
1. An ICS1893CF asserts a signal on the RXER pin upon detection of a
2. The RXER signal always transitions synchronously with RXCLK.
3. The signal on RXER pin is conditioned by the RXTRI pin.
Note:
the MII receive data nibble.
receive data signals on the RXD0–RXD3 pins to the MAC Interface
synchronously on the rising edges of RXCLK.
delimiter, /J/K/. (For the timing reference, see
“100M/MII Media Independent Interface: Synchronous Receive
Timing”.)
(/T/R/) or a signal error.
when either of the following two conditions are true:
– Errors are detected during the reception of valid frames
– A False Carrier is detected
RXD0 is the least-significant bit and RXD3 is the most-significant bit of
While the ICS1893CF asserts RXDV, the ICS1893CF transfers the
Asserts RXDV after it detects and recovers the Start-of-Stream
De-asserts RXDV after it detects either the End-of-Stream delimiter
10M MII mode, RXER is not used.
100M MII mode, the ICS1893CF asserts a signal on the RXER pin
False Carrier so that repeater applications can prevent the
propagation of a False Carrier.
10Base-T, the TXCLK frequency is 2.5 MHz.
100Base-TX, the TXCLK frequency is 25 MHz.
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92
Chapter 8 Pin Diagram, Listings, and Descriptions
Pin Description
Chapter 9.5.6,
May, 2010

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