DP83848TSQ/NOPB National Semiconductor, DP83848TSQ/NOPB Datasheet - Page 15

• Manufacturer Part Number: DP83848TSQ/NOPB
• Description: IC TXRX ETHERNET PHYTER 40-LLP
• Manufacturer: National Semiconductor
• Type: Transceiverr

Specifications of DP83848TSQ/NOPB

• Number Of Drivers/receivers: 1/1
• Protocol: Ethernet
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 40-LLP
• Data Rate: 100Mbps
• Supply Voltage Range: 3V To 3.6V
• Logic Case Style: LLP
• No. Of Pins: 40
• Operating Temperature Range: -40°C To +85°C
• Msl: MSL 2 - 1 Year
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Data Rate Max: 10Mbps
• Driver Case Style: LLP
• For Use With: DP83848T-MAU-EK - BOARD EVALUATION DP83848T
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DP83848TSQTR

2.0 Configuration
This section includes information on the various configura-
tion options available with the DP83848H. The configura-
tion options described below include:
— Auto-Negotiation
— PHY Address and LED
— Half Duplex vs. Full Duplex
— Isolate mode
— Loopback mode
— BIST
2.1 Auto-Negotiation
The Auto-Negotiation function provides a mechanism for
exchanging configuration information between two ends
of a link segment and automatically selecting the highest
performance mode of operation supported by both
devices. Fast Link Pulse (FLP) Bursts provide the signal-
ling used to communicate Auto-Negotiation abilities
between two devices at each end of a link segment. For
further detail regarding Auto-Negotiation, refer to Clause
28 of the IEEE 802.3u specification. The DP83848H sup-
ports four different Ethernet protocols (10 Mb/s Half
Duplex, 10 Mb/s Full Duplex, 100 Mb/s Half Duplex, and
100 Mb/s Full Duplex), so the inclusion of Auto-Negotia-
tion ensures that the highest performance protocol will be
selected based on the advertised ability of the Link Part-
ner. The Auto-Negotiation function within the DP83848H
can be controlled either by internal register access or by
the use of the AN0 pin.
2.1.1 Auto-Negotiation Pin Control
The state of AN0 determines the specific mode advertised
by DP83848H as given in Table 1. The state of AN0 , upon
power-up/reset, determines the state of bits [8:5] of the
ANAR register.
The Auto-Negotiation function selected at power-up or
reset can be changed at any time by writing to the Basic
Mode Control Register (BMCR) at address 0x00h
AN0
0
1
Table 1. Auto-Negotiation Modes
10BASE-T Half-Duplex
100BASE-TX, Half-Duplex
10BASE-T, Half/Full-Duplex
100BASE-TX, Half/Full-Duplex
Advertised Mode
15
2.1.2 Auto-Negotiation Register Control
When Auto-Negotiation is enabled, the DP83848H trans-
mits the abilities programmed into the Auto-Negotiation
Advertisement register (ANAR) at address 04h via FLP
Bursts. Any combination of 10 Mb/s, 100 Mb/s, Half-
Duplex, and Full Duplex modes may be selected.
Auto-Negotiation Priority Resolution:
— (1) 100BASE-TX Full Duplex (Highest Priority)
— (2) 100BASE-TX Half Duplex
— (3) 10BASE-T Full Duplex
— (4) 10BASE-T Half Duplex (Lowest Priority)
The Basic Mode Control Register (BMCR) at address 00h
provides control for enabling, disabling, and restarting the
Auto-Negotiation process. When Auto-Negotiation is dis-
abled, the Speed Selection bit in the BMCR controls
switching between 10 Mb/s or 100 Mb/s operation, and
the Duplex Mode bit controls switching between full
duplex operation and half duplex operation. The Speed
Selection and Duplex Mode bits have no effect on the
mode of operation when the Auto-Negotiation Enable bit
is set.
The Link Speed can be examined through the PHY Status
Register (PHYSTS) at address 10h after a Link is
achieved.
The Basic Mode Status Register (BMSR) indicates the set
of available abilities for technology types, Auto-Negotia-
tion ability, and Extended Register Capability. These bits
are permanently set to indicate the full functionality of the
DP83848H (only the 100BASE-T4 bit is not set since the
DP83848H does not support that function).
The BMSR also provides status on:
— Completion of Auto-Negotiation
— Occurence of a remote fault as advertised by the Link
— Establishment of a valid link
— Support for Management Frame Preamble suppression
The Auto-Negotiation Advertisement Register (ANAR)
indicates the Auto-Negotiation abilities to be advertised by
the DP83848H. All available abilities are transmitted by
default, but any ability can be suppressed by writing to the
ANAR. Updating the ANAR to suppress an ability is one
way for a management agent to change (restrict) the tech-
nology that is used.
The Auto-Negotiation Link Partner Ability Register
(ANLPAR) at address 05h is used to receive the base link
code word as well as all next page code words during the
negotiation. Furthermore, the ANLPAR will be updated to
either 0081h or 0021h for parallel detection to either 100
Mb/s or 10 Mb/s respectively.
The Auto-Negotiation Expansion Register (ANER) indi-
cates additional Auto-Negotiation status. The ANER pro-
vides status on:
— Occurance of a Parallel Detect Fault
— Next Page function support by the Link Partner
— Next page support function by DP83848H
— Reception of the current page that is exchanged by
— Auto-Negotiation support by the Link Partner
Partner
Auto-Negotiation
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