PIC16C74B-20I/L Microchip Technology Inc., PIC16C74B-20I/L Datasheet - Page 138

• Manufacturer Part Number: PIC16C74B-20I/L
• Description: 44 PIN, 7 KB OTP, 192 RAM, 33 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16C74B-20I/L

• A/d Inputs: 8-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 33
• Interface: I2C/SPI/USART
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 44-pin PLCC
• Programmable Memory: 7K Bytes
• Ram Size: 192 Bytes
• Speed: 4 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2.5-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16C63A/65B/73B/74B
FIGURE 16-20:
TABLE 16-17: A/D CONVERSION REQUIREMENTS
DS30605C-page 138
Note 1: ADRES register may be read on the following T
Param
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and
No.
130
131
132
134
135
Note 1: If the A/D clock source is selected as RC, a time of T
are not tested.
2: See Section 12.1 for minimum conditions.
A/D DATA
SAMPLE
A/D CLK
ADRES
T
T
T
Sym
T
BSF ADCON0, GO
T
SWC
CNV
ACQ
ADIF
AD
GO
instruction to be executed.
GO
Q4
A/D clock period
Conversion time (not including S/H
time) (Note 1)
Acquisition time
Q4 to A/D clock start
Switching from convert → sample time
134
132
Characteristic
A/D CONVERSION TIMING
(T
OSC
/2)
7
(1)
PIC16CXX
PIC16LCXX
PIC16CXX
PIC16LCXX
6
OLD_DATA
5
SAMPLING STOPPED
Min
CY
1.6
2.0
2.0
3.0
1.5
11
—
5*
CY
4
cycle.
is added before the A/D clock starts. This allows the SLEEP
131
130
T
Typ†
OSC
4.0
6.0
3
—
—
—
—
—
/2
2
Max
6.0
9.0
—
—
11
—
—
—
1
Units
T
T
µs
µs
µs
µs
µs
—
AD
AD
1 T
 2000 Microchip Technology Inc.
0
T
T
2.5V ≤ V
A/D RC mode
A/D RC mode
The minimum time is the
amplifier settling time. This
may be used if the “new”
input voltage has not
changed by more than 1 LSb
(i.e., 20.0mV @ 5.12V) from
the last sampled voltage (as
stated on C
If the A/D clock source is
selected as RC, a time of T
is added before the A/D clock
starts. This allows the SLEEP
instruction to be executed.
OSC
OSC
CY
based, V
based,
NEW_DATA
Conditions
REF
DONE
HOLD
≤ 5.5 V
REF
).
≥ 3.0 V
CY