PIC18F4620-I/PT Microchip Technology Inc., PIC18F4620-I/PT Datasheet - Page 145

• Manufacturer Part Number: PIC18F4620-I/PT
• Description: 44 Pin, 64 KB Flash, 3968 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4620-I/PT

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 36
• Interface: SPI/I2C/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 4K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 3-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

TABLE 15-3:
 2004 Microchip Technology Inc.
INTCON
RCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
TRISB
TRISC
TMR1L
TMR1H
T1CON
TMR3H
TMR3L
T3CON
CCPR1L
CCPR1H
CCP1CON
CCPR2L
CCPR2H
CCP2CON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by Capture/Compare, Timer1 or Timer3.
Note 1:
Name
2:
The SBOREN bit is only available when the BOREN1:BOREN0 configuration bits = 01; otherwise, it is
disabled and reads as ‘0’. See Section 4.4 “Brown-out Reset (BOR)”.
These bits are unimplemented on 28-pin devices and read as ‘0’.
PORTB Data Direction Control Register
PORTC Data Direction Control Register
Timer1 Register Low Byte
Timer1 Register High Byte
Timer3 Register High Byte
Timer3 Register Low Byte
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
Capture/Compare/PWM Register 2 Low Byte
Capture/Compare/PWM Register 2 High Byte
GIE/GIEH PEIE/GIEL
PSPIF
PSPIE
PSPIP
OSCFIE
OSCFIP
OSCFIF
P1M1
RD16
RD16
IPEN
Bit 7
—
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1 AND TIMER3
(2)
(2)
(2)
(2)
SBOREN
T3CCP2
P1M0
T1RUN
CMIE
CMIP
CMIF
ADIF
ADIE
ADIP
Bit 6
—
(2)
(1)
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
T3CKPS1 T3CKPS0 T3CCP1
TMR0IE
DC1B1
DC2B1
RCIE
RCIP
RCIF
Bit 5
—
—
—
—
PIC18F2525/2620/4525/4620
Preliminary
DC1B0
DC2B0
INT0IE
EEIE
EEIP
Bit 4
TXIF
TXIE
TXIP
EEIF
RI
CCP1M3
CCP2M3
SSPIF
SSPIE
SSPIP
BCLIF
BCLIE
BCLIP
RBIE
Bit 3
TO
CCP1M2 CCP1M1 CCP1M0
CCP2M2 CCP2M1 CCP2M0
T3SYNC
TMR0IF
CCP1IE
CCP1IP
CCP1IF
HLVDIF
HLVDIE
HLVDIP
Bit 2
PD
TMR1CS TMR1ON
TMR3CS TMR3ON
TMR2IF
TMR2IE
TMR2IP
TMR3IF
TMR3IE
TMR3IP
INT0IF
Bit 1
POR
TMR1IE
TMR1IP
TMR1IF
CCP2IF
CCP2IE
CCP2IP
DS39626B-page 143
RBIF
Bit 0
BOR
on page
Values
Reset
49
48
52
52
52
52
52
52
52
52
50
50
50
51
51
51
51
51
51
51
51
51