DSPIC30F3014-30I/P Microchip Technology Inc., DSPIC30F3014-30I/P Datasheet - Page 132

• Manufacturer Part Number: DSPIC30F3014-30I/P
• Description: DSP, 16-Bit, 24 KB Flash, 2KB RAM, 30 I/O, PDIP-40
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F3014-30I/P

• A/d Inputs: 13-Channels, 12-Bit
• Cpu Speed: 30 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 30
• Interface: CAN, I2C, SPI, UART/USART
• Ios: 30
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 40-pin PDIP
• Programmable Memory: 24K Bytes
• Ram Size: 2K Bytes
• Timers: 3-16-bit, 1-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

dsPIC30F3014/4013
FIGURE 19-3:
19.8
The analog input model of the 12-bit A/D converter is
shown in Figure 19-4. The total sampling time for the A/
D is a function of the internal amplifier settling time and
the holding capacitor charge time.
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the voltage level on the analog input
pin. The source impedance (R
impedance (R
(R
FIGURE 19-4:
DS70138E-page 130
SS
Instruction Execution BSET ADCON1, ASAM
) impedance combine to directly affect the time
ADCBUF0
ADCBUF1
ADCLK
A/D Acquisition Requirements
DONE
SAMP
Note: C
IC
), and the internal sampling switch
Legend: C
VA
PIN
CONVERTING 1 CHANNEL AT 200 KSPS, AUTO-SAMPLE START, 1 T
SAMPLING TIME
12-BIT A/D CONVERTER ANALOG INPUT MODEL
Rs
value depends on device package and is not tested. Effect of C
V
I leakage
R
R
C
ANx
T
PIN
IC
SS
HOLD
C
PIN
= 1 T
T
HOLD
SAMP
S
AD
), the interconnect
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch resistance
= sample/hold capacitance (from DAC)
) must be allowed
various junctions
V
DD
V
V
T
T
= 0.6V
= 0.6V
= 14 T
T
CONV
AD
= 1 T
T
R
I leakage
± 500 nA
SAMP
IC
AD
≤ 250Ω
required to charge the capacitor C
impedance of the analog sources must therefore be
small enough to fully charge the holding capacitor
within the chosen sample time. To minimize the effects
of pin leakage currents on the accuracy of the A/D con-
verter, the maximum recommended source imped-
ance, R
selected (changed), this sampling function must be
completed prior to starting the conversion. The internal
holding capacitor will be in a discharged state prior to
each sample operation.
S
Sampling
Switch
, is 2.5 kΩ. After the analog input channel is
R
SS
= 14 T
T
PIN
CONV
R
AD
negligible if Rs ≤ 2.5 kΩ.
SS
V
SS
C
= DAC capacitance
= 18 pF
≤ 3 kΩ
HOLD
© 2007 Microchip Technology Inc.
HOLD
. The combined
AD