DSPIC30F3014-30I/P Microchip Technology Inc., DSPIC30F3014-30I/P Datasheet - Page 99

• Manufacturer Part Number: DSPIC30F3014-30I/P
• Description: DSP, 16-Bit, 24 KB Flash, 2KB RAM, 30 I/O, PDIP-40
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F3014-30I/P

• A/d Inputs: 13-Channels, 12-Bit
• Cpu Speed: 30 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 30
• Interface: CAN, I2C, SPI, UART/USART
• Ios: 30
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 40-pin PDIP
• Programmable Memory: 24K Bytes
• Ram Size: 2K Bytes
• Timers: 3-16-bit, 1-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

16.0
This section describes the Universal Asynchronous
Receiver/Transmitter Communications module.
16.1
The key features of the UART module are:
• Full-duplex, 8 or 9-bit data communication
• Even, odd or no parity options (for 8-bit data)
FIGURE 16-1:
© 2007 Microchip Technology Inc.
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the “dsPIC30F Family Reference
Manual” (DS70046).
UxTX
or UxATX
if ALTIO=1
Note:
UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART) MODULE
UART Module Overview
x = 1 or 2.
UART TRANSMITTER BLOCK DIAGRAM
Internal Data Bus
UTXBRK
Data
Parity
‘
‘
0
1
’ (Start)
’ (Stop)
Generator
Parity
Write
Transmit Shift Register (UxTSR)
UTX8 UxTXREG Low Byte
• One or two Stop bits
• Fully integrated Baud Rate Generator with 16-bit
• Baud rates range from 38 bps to 1.875 Mbps at a
• 4-word deep transmit data buffer
• 4-word deep receive data buffer
• Parity, framing and buffer overrun error detection
• Support for interrupt only on address detect
• Separate transmit and receive interrupts
• Loopback mode for diagnostic support
• Two choices of TX/RX pins on UART1 module
prescaler
30 MHz instruction rate
(9th bit = 1)
dsPIC30F3014/4013
Load TSR
16 Divider
Write
Control
Signals
Control and Status bits
– Control TSR
– Control Buffer
– Generate Flags
– Generate Interrupt
Transmit Control
16x Baud Clock
from Baud Rate
Generator
DS70138E-page 97
UxTXIF