PIC18F8520-I/PT Microchip Technology Inc., PIC18F8520-I/PT Datasheet - Page 242

• Manufacturer Part Number: PIC18F8520-I/PT
• Description: 80 PIN, 32 KB FLASH, 2048 RAM, 68 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F8520-I/PT

• A/d Inputs: 16-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 68
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 80-pin TQFP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 40 MHz
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC18F6520/8520/6620/8620/6720/8720
TABLE 23-1:
REGISTER 23-1:
DS39609B-page 240
300001h
300002h
300003h
300004h
300005h
300006h
300008h
300009h
30000Ah
30000Bh
30000Ch
30000Dh
3FFFFEh DEVID1
3FFFFFh
Legend:
Note 1:
File Name
2:
3:
4:
(1)
DEVID2
CONFIG1H
CONFIG2L
CONFIG2H
CONFIG3L
CONFIG3H
CONFIG4L DEBUG
CONFIG5L
CONFIG5H
CONFIG6L WRT7
CONFIG6H
CONFIG7L EBTR7
CONFIG7H
x = unknown, u = unchanged, – = unimplemented, q = value depends on condition, r = reserved.
Shaded cells are unimplemented, read as ‘0’.
Unimplemented in PIC18F6X20 devices; maintain this bit set.
Unimplemented in PIC18FX520 and PIC18FX620 devices; maintain this bit set.
Unimplemented in PIC18FX620 and PIC18FX720 devices; maintain this bit set.
See Register 23-13 for DEVID1 values.
bit 7-6
bit 5
bit 4-3
bit 2-0
CONFIGURATION BITS AND DEVICE IDS
CONFIG1H: CONFIGURATION REGISTER 1 HIGH (BYTE ADDRESS 300001h)
bit 7
Unimplemented: Read as ‘0’
OSCSEN: Oscillator System Clock Switch Enable bit
1 = Oscillator system clock switch option is disabled (main oscillator is source)
0 = Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled)
Unimplemented: Read as ‘0’
FOSC2:FOSC0: Oscillator Selection bits
111 = RC oscillator w/ OSC2 configured as RA6
110 = HS oscillator with PLL enabled; clock frequency = (4 x F
101 = EC oscillator w/ OSC2 configured as RA6
100 = EC oscillator w/ OSC2 configured as divide-by-4 clock output
011 = RC oscillator w/ OSC2 configured as divide-by-4 clock output
010 = HS oscillator
001 = XT oscillator
000 = LP oscillator
DEV10
CP7
WRTD
Legend:
R = Readable bit
- n = Value when device is unprogrammed
DEV2
WAIT
Bit 7
CPD
—
—
—
—
—
U-0
(2)
—
(2)
(2)
EBTR6
WRT6
EBTRB
CP6
WRTB
DEV1
DEV9
Bit 6
CPB
—
—
—
—
—
—
(2)
(2)
(2)
U-0
—
OSCSEN
EBTR5
WRT5
WRTC
CP5
DEV0
DEV8
Bit 5
—
—
—
—
—
—
—
(2)
(2)
(2)
P = Programmable bit
OSCSEN
R/P-1
EBTR4
WRT4
CP4
REV4
DEV7
Bit 4
—
—
—
—
—
—
—
—
—
(2)
(2)
(2)
WDTPS2
BORV1
EBTR3
WRT3
REV3
DEV6
Bit 3
CP3
U-0
—
—
—
—
—
—
—
—
WDTPS1
FOSC2
BORV0
EBTR2
WRT2
REV2
DEV5
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
Bit 2
CP2
LVP
—
—
—
—
—
U-0
—
WDTPS0
BODEN
FOSC1
EBTR1
WRT1
REV1
DEV4
Bit 1
PM1
CP1
OSC
FOSC2
r
—
—
—
—
(3)
R/P-1
 2004 Microchip Technology Inc.
)
PWRTEN
CCP2MX
STVREN
WDTEN
FOSC0
EBTR0
WRT0
REV0
DEV3
Bit 0
PM0
FOSC1
CP0
R/P-1
—
—
—
Unprogrammed
--1- -111
---- 1111
---- 1111
1--- --11
---- --11
1--- -1-1
1111 1111
11-- ----
1111 1111
111- ----
1111 1111
-1-- ----
0000 0110
FOSC0
Default/
R/P-1
Value
(4)
bit 0