DSPIC33FJ64MC506-I/PT Microchip Technology Inc., DSPIC33FJ64MC506-I/PT Datasheet - Page 117
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
DSPIC33FJ64MC506-I/PT
Manufacturer Part Number
DSPIC33FJ64MC506-I/PT
Description
DSP, 16-Bit, 64KB Flash, 8KB RAM, 53 I/O, TQFP-64
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC33FJ64MC506-IPT.pdf
(370 pages)
Specifications of DSPIC33FJ64MC506-I/PT
A/d Inputs
16-Channels, 12-Bit
Comparators
8
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
53
Interface
CAN, I2C, SPI, UART/USART
Ios
53
Memory Type
Flash
Number Of Bits
16
Package Type
64-pin TQFP
Programmable Memory
64K Bytes
Ram Size
8K Bytes
Timers
9-16-bit, 4-32-bit
Voltage, Range
3-3.6
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ64MC506-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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REGISTER 6-16:
© 2007 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
bit 7
bit 6-4
bit 3
bit 2-0
U-0
U-0
—
—
Unimplemented: Read as ‘0’
T2IP<2:0>: Timer2 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
OC2IP<2:0>: Output Compare Channel 2 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
IC2IP<2:0>: Input Capture Channel 2 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
DMA0IP<2:0>: DMA Channel 0 Data Transfer Complete Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
R/W-1
R/W-1
IPC1: INTERRUPT PRIORITY CONTROL REGISTER 1
W = Writable bit
‘1’ = Bit is set
IC2IP<2:0>
T2IP<2:0>
R/W-0
R/W-0
R/W-0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
R/W-1
R/W-1
DMA0IP<2:0>
OC2IP<2:0>
x = Bit is unknown
dsPIC33F
R/W-0
R/W-0
DS70165E-page 115
R/W-0
R/W-0
bit 8
bit 0
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