DS3251+ Maxim Integrated Products, DS3251+ Datasheet - Page 38

• Manufacturer Part Number: DS3251+
• Description: IC LIU DS3/E3/STS-1 144-CSBGA
• Manufacturer: Maxim Integrated Products
• Type: Line Interface Units (LIUs)r

Specifications of DS3251+

• Number Of Drivers/receivers: 1/1
• Protocol: DS3
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 144-CSBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Early Termination of Bus Transactions. The bus master can terminate SPI bus transactions at any time by
pulling CS high. In response to early terminations, the DS325x resets its SPI interface logic and waits for the start
of the next transaction. If a write transaction is terminated prior to the SCLK edge that latches the LSB of a data
byte, the current data byte is not written.
Design Option: Wiring SDI and SDO Together. Because communication between the bus master and the
DS325x is half-duplex, the SDI and SDO pins can be wired together externally to reduce wire count. To support
this option, the bus master must not drive the SDI/SDO line when the DS325x is transmitting.
AC Timing. See
Figure 15-1. SPI Clock Polarity and Phase Options
SDI/SDO
SCK
SCK
SCK
SCK
Table 17-I
CS
CPOL = 0, CPHA = 0
CPOL = 0, CPHA = 1
CPOL = 1, CPHA = 0
CPOL = 1, CPHA = 1
and
Figure 17-5
MSB
CLOCK EDGE USED FOR DATA CAPTURE (ALL MODES)
6
for AC timing specifications for the SPI interface.
5
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4
3
2
1
LSB