PIC18F2520-I/SO Microchip Technology Inc., PIC18F2520-I/SO Datasheet - Page 245

• Manufacturer Part Number: PIC18F2520-I/SO
• Description: 28 Pin, 32 KB Flash, 1536 RAM, 25 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2520-I/SO

• A/d Inputs: 10-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SOIC
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

22.0
PIC18F2420/2520/4420/4520
High/Low-Voltage Detect module (HLVD). This is a pro-
grammable circuit that allows the user to specify both a
device voltage trip point and the direction of change from
that point. If the device experiences an excursion past
the trip point in that direction, an interrupt flag is set. If the
interrupt is enabled, the program execution will branch to
the interrupt vector address and the software can then
respond to the interrupt.
REGISTER 22-1:
 2004 Microchip Technology Inc.
HIGH/LOW-VOLTAGE
DETECT (HLVD)
bit 7
bit 6
bit 5
bit 4
bit 3-0
HLVDCON REGISTER (HIGH/LOW-VOLTAGE DETECT CONTROL)
bit 7
VDIRMAG: Voltage Direction Magnitude Select bit
1 = Event occurs when voltage equals or exceeds trip point (HLVDL3:HLDVL0)
0 = Event occurs when voltage equals or falls below trip point (HLVDL3:HLVDL0)
Unimplemented: Read as ‘0’
IRVST: Internal Reference Voltage Stable Flag bit
1 = Indicates that the voltage detect logic will generate the interrupt flag at the specified voltage
0 = Indicates that the voltage detect logic will not generate the interrupt flag at the specified
HLVDEN: High/Low-Voltage Detect Power Enable bit
1 = HLVD enabled
0 = HLVD disabled
HLVDL3:HLVDL0: Voltage Detection Limit bits
1111 = External analog input is used (input comes from the HLVDIN pin)
1110 = Maximum setting
.
.
.
0000 = Minimum setting
VDIRMAG
Legend:
R = Readable bit
-n = Value at POR
R/W-0
Note 1: See Table 26-4 for specifications.
range
voltage range and the HLVD interrupt should not be enabled
devices
U-0
—
have
PIC18F2420/2520/4420/4520
IRVST
R-0
W = Writable bit
‘1’ = Bit is set
a
HLVDEN HLVDL3
R/W-0
The
(Register 22-1) completely controls the operation of the
HLVD module. This allows the circuitry to be “turned
off” by the user under software control, which
minimizes the current consumption for the device.
The block diagram for the HLVD module is shown in
Figure 22-1.
(1)
High/Low-Voltage
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
HLVDL2
R/W-1
Detect
(1)
HLVDL1
x = Bit is unknown
R/W-0
DS39631A-page 243
Control
(1)
HLVDL0
R/W-1
register
bit 0
(1)