PIC16F54-I/P Microchip Technology Inc., PIC16F54-I/P Datasheet - Page 33

• Manufacturer Part Number: PIC16F54-I/P
• Description: 18 PIN, 768 B FLASH, 25 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F54-I/P

• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Frequency: 20 MHz
• Input Output: 12
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 750 Bytes
• Ram Size: 25 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

6.8
6.8.1
Some instructions operate internally as read followed
by write operations. The BCF and BSF instructions, for
example, read the entire port into the CPU, execute the
bit operation and re-write the result. Caution must be
used when these instructions are applied to a port
where one or more pins are used as input/outputs. For
example, a BSF operation on bit 5 of PORTB will cause
all eight bits of PORTB to be read into the CPU, bit 5 to
be set and the PORTB value to be written to the output
latches. If another bit of PORTB is used as a
bidirectional I/O pin (say bit ‘0’), and it is defined as an
input at this time, the input signal present on the pin
itself would be read into the CPU and rewritten to the
data latch of this particular pin, overwriting the previous
content. As long as the pin stays in the Input mode, no
problem occurs. However, if bit ‘0’ is switched into
Output mode later on, the content of the data latch may
now be unknown.
Example 6-1 shows the effect of two sequential read-
modify-write instructions (e.g., BCF, BSF, etc.) on an
I/O port.
A pin actively outputting a high or a low should not be
driven from external devices at the same time in order
to change the level on this pin (“wired-or”, “wired-and”).
The resulting high output currents may damage the
chip.
FIGURE 6-2:
 2004 Microchip Technology Inc.
Instruction
Instruction
I/O Programming Considerations
executed
RB<7:0>
fetched
BIDIRECTIONAL I/O PORTS
Execute INST (PC - 1) Fetch INST (PC + 1)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
MOVWF PORTB
Fetch INST (PC)
SUCCESSIVE I/O OPERATION
PC
MOVF PORTB,W
MOVWF PORTB
Execute INST (PC)
(Write to
PORTB)
written here
PC + 1
Port pin
Execute INST (PC + 1) Fetch INST (PC + 3)
Fetch INST (PC + 2)
MOVF PORTB,W
(Read
PORTB)
sampled here
NOP
PC + 2
Port pin
EXAMPLE 6-1:
6.8.2
The actual write to an I/O port happens at the end of an
instruction cycle, whereas for reading, the data must be
valid at the beginning of the instruction cycle (see
Figure 6-2). Therefore, care must be exercised if a write
followed by a read operation is carried out on the same
I/O port. The sequence of instructions should allow the pin
voltage to stabilize (load dependent) before the next
instruction, which causes that file to be read into the CPU,
is executed. Otherwise, the previous state of that pin may
be read into the CPU rather than the new state. When in
doubt, it is better to separate these instructions with a NOP
or another instruction not accessing this I/O port.
;Initial PORT Settings
;PORTB<7:4> Inputs
;PORTB<3:0> Outputs
;PORTB<7:6> have external pull-ups and are
;not connected to other circuitry
;
;
;
;
;Note that the user may have expected the
;values to be 00pp pppp. The 2nd BCF caused
;RB7 to be latched as the pin value (High).
Execute INST (PC + 2)
pin
BCF
BCF
MOVLW H'3F'
TRIS
PC + 3
NOP
NOP
PORTB, 7
PORTB, 6
PORTB
SUCCESSIVE OPERATIONS ON I/O
PORTS
This example shows a write
to PORTB followed by a read
from PORTB.
;01pp pppp
;10pp pppp
;
;10pp pppp
PORT latch PORT pins
---------------------
READ-MODIFY-WRITE
INSTRUCTIONS ON AN I/O
PORT
PIC16F5X
DS41213C-page 31
11pp pppp
11pp pppp
10pp pppp