PIC18F24J10-I/SS Microchip Technology Inc., PIC18F24J10-I/SS Datasheet - Page 215

• Manufacturer Part Number: PIC18F24J10-I/SS
• Description: Microcontroller; 16 KB Flash; 1024 RAM; 0 EEPROM; 21 I/O; 28-Pin-SSOP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F24J10-I/SS

• A/d Inputs: 10-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 21
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SSOP
• Programmable Memory: 16K Bytes
• Ram Size: 1K Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 2-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

The value in the ADRESH:ADRESL registers is not
modified for a Power-on Reset. The ADRESH:ADRESL
registers will contain unknown data after a Power-on
Reset.
After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see Section 17.1
“A/D Acquisition Requirements”. After this acquisi-
tion time has elapsed, the A/D conversion can be
started. An acquisition time can be programmed to
occur between setting the GO/DONE bit and the actual
start of the conversion.
The following steps should be followed to perform an A/D
conversion:
1.
2.
3.
4.
FIGURE 17-3:
© 2006 Microchip Technology Inc.
Configure the A/D module:
• Configure analog pins, voltage reference and
• Select A/D input channel (ADCON0)
• Select A/D acquisition time (ADCON2)
• Select A/D conversion clock (ADCON2)
• Turn on A/D module (ADCON0)
Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set GIE bit
Wait the required acquisition time (if required).
Start conversion:
• Set GO/DONE bit (ADCON0 register)
digital I/O (ADCON1)
Legend: C
V
AIN
Rs
V
I
R
SS
C
R
LEAKAGE
ANALOG INPUT MODEL
T
PIN
IC
HOLD
SS
ANx
C
5 pF
PIN
= Input Capacitance
= Threshold Voltage
= Leakage Current at the pin due to
= Interconnect Resistance
= Sampling Switch
= Sample/Hold Capacitance (from DAC)
= Sampling Switch Resistance
various junctions
V
DD
V
V
T
T
= 0.6V
Preliminary
= 0.6V
PIC18F45J10 FAMILY
I
± 100 nA
5.
6.
7.
FIGURE 17-2:
LEAKAGE
R
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
Read A/D Result registers (ADRESH:ADRESL);
clear bit ADIF, if required.
For next conversion, go to step 1 or step 2, as
required. The A/D conversion time per bit is
defined as T
required before the next acquisition starts.
IC
3FFh
3FEh
003h
002h
001h
000h
≤ 1k
V
DD
SS
Sampling
Switch
AD
6 V
5 V
4 V
3 V
2 V
R
. A minimum wait of 2 T
SS
A/D TRANSFER FUNCTION
Analog Input Voltage
Sampling Switch
1
V
SS
2
C
HOLD
3
DS39682B-page 213
= 25 pF
4
(kΩ)
AD
is