PIC18F4620-E/P Microchip Technology Inc., PIC18F4620-E/P Datasheet - Page 294

• Manufacturer Part Number: PIC18F4620-E/P
• Description: 40 Pin, 64 KB Flash, 3968 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4620-E/P

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 36
• Interface: SPI/I2C/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 64K Bytes
• Ram Size: 4K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 3-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2525/2620/4525/4620
MOVFF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (source)
2nd word (destin.)
Description:
Words:
Cycles:
Example:
DS39626B-page 292
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Decode
REG1
REG2
REG1
REG2
Q1
No dummy
register ‘f’
operation
Move f to f
MOVFF f
0
0
(f
None
The contents of source register ‘f
moved to destination register ‘f
Location of source ‘f
in the 4096-byte data space (000h to
FFFh) and location of destination ‘f
can also be anywhere from 000h to
FFFh.
Either source or destination can be W
(a useful special situation).
MOVFF
transferring a data memory location to a
peripheral register (such as the transmit
buffer or an I/O port).
The MOVFF instruction cannot use the
PCL, TOSU, TOSH or TOSL as the
destination register.
2
2 (3)
MOVFF
s
Read
(src)
read
)
1100
1111
Q2
No
f
f
=
=
=
=
s
d
f
d
4095
4095
is particularly useful for
33h
11h
33h
33h
s
REG1, REG2
,f
ffff
ffff
d
operation
Process
Data
Q3
No
s
’ can be anywhere
ffff
ffff
register ‘f’
operation
(dest)
Write
d
Q4
No
fff
fff
’.
s
’ are
d
Preliminary
f
f
’
s
d
MOVLB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
BSR Register =
BSR Register =
Q1
Move Literal to Low Nibble in BSR
MOVLW k
0
k
None
The eight-bit literal ‘k’ is loaded into the
Bank Select Register (BSR). The value of
BSR<7:4> always remains ‘
of the value of k
1
1
MOVLB
0000
literal ‘k’
k
Read
BSR
Q2
 2004 Microchip Technology Inc.
255
02h
05h
0001
7
Process
5
:k
Data
4
Q3
.
kkkk
0
’, regardless
Write literal
‘k’ to BSR
Q4
kkkk