ISP1506BBS-T ST-Ericsson Inc, ISP1506BBS-T Datasheet - Page 16

no-image

ISP1506BBS-T

Manufacturer Part Number
ISP1506BBS-T
Description
IC ULPI TRANSCEIVER 24-HVQFN
Manufacturer
ST-Ericsson Inc
Type
Transceiverr
Datasheet

Specifications of ISP1506BBS-T

Number Of Drivers/receivers
1/1
Protocol
USB 2.0
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
Table 4.
Table 5.
ISP1506A_ISP1506B_1
Product data sheet
Signal name
DIR
STP
NXT
Signal
LINESTATE0
LINESTATE1
Reserved
INT
ULPI signal description
Signal mapping during low-power mode
Direction on
ISP1506
O
I
O
8.1.2 Low-power mode
Maps to
DATA0
DATA1
DATA2
DATA3
When USB is idle, the link can place the ISP1506 into low-power mode (also called
suspend mode). In low-power mode, the data bus definition changes to that shown in
Table
Control register to logic 0. To exit low-power mode, the link asserts the STP signal. The
ISP1506 will draw only suspend current from the V
During low-power mode, the clock on XTAL1 may be stopped. The clock must be started
again before asserting STP to exit low-power mode. After exiting low-power mode, the
ISP1506 will send an RXCMD to the link if a change was detected in any interrupt source,
and the change still exists. An RXCMD may not be sent if the interrupt condition is
removed before exiting.
For more information on low-power mode enter and exit protocols, refer to
Low Pin Interface (ULPI) Specification Rev.
Signal description
Direction: Controls the direction of DATA[3:0] data bus. In synchronous mode, the ISP1506
drives DIR to LOW by default, making the data bus an input so that the ISP1506 can listen
for TXCMDs from the link. The ISP1506 drives DIR to HIGH only when it has data for the
link. When DIR and NXT are HIGH, the byte on the data bus contains decoded USB data.
When DIR is HIGH and NXT is LOW, the byte contains status information called RXCMD
(receive command). The only exception to this rule is when the PHY returns register read
data, where NXT is also LOW, replacing the usual RXCMD byte. Every change in DIR
causes a turnaround cycle on the data bus, during which DATA[3:0] is not valid and must be
ignored by the link.
DIR is always asserted during low-power and 3-pin serial modes.
Stop: In synchronous mode, the link drives STP to HIGH for one cycle after the last byte of
data is sent to the ISP1506. The link can optionally assert STP to force DIR to be
de-asserted.
In low-power and 3-pin serial modes, the link holds STP at HIGH to wake up the ISP1506,
causing the ULPI bus to return to synchronous mode.
Next: In synchronous mode, the ISP1506 drives NXT to HIGH to throttle data. If DIR is LOW,
the ISP1506 asserts NXT to notify the link to place the next data byte on DATA[3:0] in the
following clock cycle. If DIR is HIGH, the ISP1506 asserts NXT to notify the link that a valid
USB data byte is on DATA[3:0] in the current cycle. The ISP1506 always drives an RXCMD
when DIR is HIGH and NXT is LOW, unless register read data is to be returned to the link in
the current cycle.
NXT is not used in low-power or 3-pin serial modes.
5. To enter low-power mode, the link sets the SUSPENDM bit in the Function
Direction
O
O
O
O
…continued
Description
combinatorial LINESTATE0 directly driven by the analog receiver
combinatorial LINESTATE1 directly driven by the analog receiver
reserved; the ISP1506 will drive this pin to LOW
active HIGH interrupt indication; will be asserted whenever any
unmasked interrupt occurs
Rev. 01 — 30 May 2007
1.1”.
ISP1506A; ISP1506B
CC
supply (see
ULPI HS USB OTG transceiver
Table
© NXP B.V. 2007. All rights reserved.
45).
Ref. 3 “UTMI+
16 of 79

Related parts for ISP1506BBS-T