71M6541F-IGT/F Maxim Integrated Products, 71M6541F-IGT/F Datasheet - Page 121

• Manufacturer Part Number: 71M6541F-IGT/F
• Description: PMIC Solutions Precision Energy Meter IC
• Manufacturer: Maxim Integrated Products
• Type: Metering SoCr

Specifications of 71M6541F-IGT/F

• Core: 8051
• Core Architecture: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 5 KB
• Device Million Instructions Per Second: 5 MIPS
• Interface Type: I2C, ICE, SPI, UART
• Maximum Clock Frequency: 5 MHz
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Programmable I/os: 30
• Number Of Timers: 2
• On-chip Adc: 22 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Package / Case: LQFP-64
• Processor Series: 8051
• Program Memory Size: 64 KB
• Program Memory Type: Flash
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

v1.1
Name
RMT_E
RMT_RD[15:8]
RMT_RD[7:0]
RTC_FAIL
RTC_P[16:14]
RTC_P[13:6]
RTC_P[5:0]
RTC_Q[1:0]
RTC_RD
RTC_SBSC[7:0]
RTC_TMIN[5:0]
RTC_THR[4:0]
RTC_WR
RTC_SEC[5:0]
RTC_MIN[5:0]
RTC_HR[4:0]
RTC_DAY[2:0]
RTC_DATE[4:0]
RTC_MO[3:0]
RTC_YR[7:0]
RTCA_ADJ[6:0]
289C[7:0]
289D[7:2]
289D[1:0]
289B[2:0]
289E[5:0]
289F[4:0]
Location
2602[7:0]
2603[7:0]
2892[7:0]
2893[5:0]
2894[5:0]
2895[4:0]
2896[2:0]
2897[4:0]
2898[3:0]
2899[7:0]
2504[7:0]
2709[3]
2890[4]
2890[6]
2890[7]
© 2008–2011 Teridian Semiconductor Corporation
Rst Wk Dir
40 –
0
0
0
4
0
0
0
0
–
0
0
0
–
–
–
–
–
–
–
0
0
0
4
0
0
0
0
–
–
–
0
–
–
–
–
–
–
–
R/W
R/W
R/W
R/W
R/W
R/W The target minutes register. See RTC_THR below.
R/W
R/W
R/W
R/W Analog RTC frequency adjust register.
R
R
Description
Enables the remote digital isolation interface, which transforms the IBP-IBN
pins into a digital balanced differential pair. Thus, enabling these pins to
interface to the 71M6x01 isolated sensor.
Response from remote read request.
Indicates that a count error has occurred in the RTC and that the time is not
trustworthy. This bit can be cleared by writing a 0.
RTC adjust. See
0x0FFBF ≤ RTC_P ≤ 0x10040
Note: RTC_P[16:0] and RTC_Q[1:0] form a single 19-bit RTC adjustment value.
RTC adjust. See
Note: RTC_P[16:0] and RTC_Q[1:0] form a single 19-bit RTC adjustment value.
Freezes the RTC shadow register so it is suitable for MPU reads. When
RTC_RD is read, it returns the status of the shadow register: 0 = up to date, 1
= frozen.
Time remaining until the next 1 second boundary. LSB = 1/256 second.
The target hours register. The RTC_T interrupt occurs when RTC_MIN
becomes equal to RTC_TMIN and RTC_HR becomes equal to RTC_THR.
Freezes the RTC shadow register so it is suitable for MPU writes. When
RTC_WR is cleared, the contents of the shadow register are written to the
RTC counter on the next RTC clock (~500 Hz). When RTC_WR is read, it
returns 1 as long as RTC_WR is set. It continues to return one until the RTC
counter actually updates.
The RTC interface registers. These are the year, month, day, hour, minute
and second parameters for the RTC. The RTC is set by writing to these
registers. Year 00 and all others divisible by 4 are defined as a leap year.
Each write operation to one of these registers must be preceded by a write to
0x20A0.
SEC
MIN
HR
DAY
DATE 01 to 31
MO
YR
00 to 59
00 to 59
00 to 23 (00 = Midnight)
01 to 07 (01 = Sunday)
00 to 99
01 to 12
2.5.4 Real-Time Clock
2.5.4 Real-Time Clock
(RTC).
(RTC).
121