71M6542F-IGT/F Maxim Integrated Products, 71M6542F-IGT/F Datasheet - Page 9
![no-image](/images/manufacturer_photos/0/4/417/maxim_integrated_products_sml.jpg)
71M6542F-IGT/F
Manufacturer Part Number
71M6542F-IGT/F
Description
PMIC Solutions Precision Energy Meter IC
Manufacturer
Maxim Integrated Products
Type
Metering SoCr
Datasheet
1.71M6541F-DB.pdf
(165 pages)
Specifications of 71M6542F-IGT/F
Core
8051
Core Architecture
8051
Data Bus Width
8 bit
Data Ram Size
5 KB
Device Million Instructions Per Second
5 MIPS
Interface Type
I2C, ICE, SPI, UART
Maximum Clock Frequency
5 MHz
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Programmable I/os
51
Number Of Timers
2
On-chip Adc
22 bit
Operating Supply Voltage
3 V to 3.6 V
Package / Case
LQFP-100
Processor Series
8051
Program Memory Size
64 KB
Program Memory Type
Flash
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
71M6542F-IGT/F
Manufacturer:
AD
Quantity:
1 500
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v1.1
VARPULSE
SEGDIO51/
SEGDIO55
WPULSE/
OPT_RX/
OPT_TX/
TEST
XOUT
IAN
IBN
VA
IAP
IBP
VB*
XIN
RX
TX
* 71M6542 only
MODE
TEST
MUX
INTERFACE
OPTICAL
UART0
MUX CTRL
Oscillator
CLOCK GEN
PREAMP
32 KHz
POWER FAULT
MUX
and
DETECTION
VBIAS
CE CONTROL
4.9 MHz
CROSS
RTCLK (32KHz)
CK32
< 4.9MHz
< 4.9MHz
MUX_SYNC
CKCE
CKMPU
CK_4X
CKMPU_2x
© 2008–2011 Teridian Semiconductor Corporation
WAKE
VBIAS
FAULTZ
VREF
VSTAT
Figure 1: IC Functional Block Diagram
STRT
32-bit Compute
RESET
VREF
(80515)
MPU
MCK
Engine
PLL
MPU_RSTZ
CE
V3P3A
4.9 MHZ
32KHz
VBIAS
CK32
INTERFACE
EEPROM
SDOUT
SDCK
SDIN
0x0000...0xFFFF
CKMPU_2x
RTM
WPULSE
VARPULSE
+
0x000...0x3FF
E_RXTX/SEG48
-
0x0000...0xFFFF
E_TCLK/SEG49
VREF
ADC
PROGRAM
DIV
AD CONVERTER
DATA
E_RST/SEG50
16
8
CKADC
8
PROG
∆Σ
32
MPU RAM
0x000...0x2FF
3/5 KB
CEDATA
EMULATOR
MEMORY
3
PORT
SHARE
CKFIR
V3P3A
E_RXTX
E_TCLK
E_RST(Open Drain)
0x0000...0x13FF
0x2000...0x20FF
8
VARPULSE
8
FIR
WPULSE
0x0000…
0xFFFF
MEMORY SHARE
16
MUX
GNDA
ICE_E
22
64/32 KB
GNDD
FLASH
RTM
CONFIGURATION
CONFIGURATION
LCD DRIVER
PARAMETERS
FIGURATION
Voltage
VLCD
LCD_GEN
DIGITAL I/O
Non-Volatile
VLCD
Boost
(I/O RAM)
TEST MUX
CON-
RTC
RAM
RAM
2.5V to logic
V3P3SYS
Regulator
Voltage
VLC2
VLC1
VLC0
TEST MUX
2/15/2011
SENSOR
6
RTCLK
TEMP
TEST
BAT
2
2
SEG Pins
SEGDIO Pins
COM0..5
PB
VBAT
VDD
V3P3D
VBAT_RTC
9
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