71M6543F-IGTR/F Maxim Integrated Products, 71M6543F-IGTR/F Datasheet - Page 32
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71M6543F-IGTR/F
Manufacturer Part Number
71M6543F-IGTR/F
Description
PMIC Solutions Precision Energy Meter IC
Manufacturer
Maxim Integrated Products
Type
Metering SoCr
Datasheet
1.71M6543F-DB.pdf
(157 pages)
Specifications of 71M6543F-IGTR/F
Core
8051
Core Architecture
8051
Data Bus Width
8 bit
Data Ram Size
5 KB
Device Million Instructions Per Second
5 MIPS
Interface Type
I2C, ICE, SPI, UART
Maximum Clock Frequency
5 MHz
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Programmable I/os
51
Number Of Timers
2
On-chip Adc
22 bit
Operating Supply Voltage
3 V to 3.6 V
Package / Case
LQFP-100
Processor Series
8051
Program Memory Size
64 KB
Program Memory Type
Flash
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
71M6543F-IGTR/F
Manufacturer:
Maxim Integrated
Quantity:
10 000
71M6543F/H and 71M6543G/GH Data Sheet
An alternative data pointer is available in the form of the PDATA register (SFR 0xBF), sometimes referred
to as USR2). It defines the high byte of a 16-bit address when reading or writing XDATA with the instruction
MOVX A,@Ri or MOVX @Ri,A.
Internal Data Memory Map and Access
The Internal data memory provides 256 bytes (0x00 to 0xFF) of data memory. The internal data memory
address is always 1 byte wide.
The Special Function Registers (SFR) occupy the upper 128 bytes. The SFR area of internal data memory
is available only by direct addressing. Indirect addressing of this area accesses the upper 128 bytes of
Internal RAM. The lower 128 bytes contain working registers and bit addressable memory. The lower 32
bytes form four banks of eight registers (R0-R7). Two bits on the program memory status word (PSW, SFR
0xD0 ) select which bank is in use. The next 16 bytes form a block of bit addressable memory space at
addresses 0x00-0x7F. All of the bytes in the lower 128 bytes are accessible through direct or indirect
addressing.
2.4.2 Special Function Registers (SFRs)
A map of the Special Function Registers is shown in
Only a few addresses in the SFR memory space are occupied, the others are not implemented. A read
access to unimplemented addresses returns undefined data, while a write access has no effect. SFRs
specific to the 71M6543 are shown in bold print on a gray field. The registers at 0x80, 0x88, 0x90, etc.,
are bit addressable, all others are byte addressable.
32
Hex/
Bin
E8
E0
D8
D0
C8
C0
B8
B0
A8
A0
F8
F0
98
90
88
80
Addressable
Address Range
INTBITS
0x80
0x30
0x20
0x00
IFLAGS
WDCON
T2CON
IRCON
S0CON
TCON
X000
IEN1
IEN0
PSW
Bit
P3
P2
P1
P0
B
A
0xFF
0x7F
0x2F
0x1F
VSTAT
S0BUF
TMOD
X001
DIR2
DIR1
IP1
IP0
SP
© 2008–2011 Teridian Semiconductor Corporation
Special Function Registers (SFRs)
Table 10
Table 11: Special Function Register Map
FLSHCTL
Table 10: Internal Data Memory Map
S0RELH
S0RELL
X010
DIR0
IEN2
DPL
DPS
TL0
Direct Addressing
shows the internal data memory map.
S1RELH
S1CON
X011
DPH
TL1
Byte Addressable
Register banks R0…R7
Byte addressable area
Bit addressable area
Table
ERASE
RCMD SPI_CMD
S1BUF
X100
DPL1
TH0
11.
S1RELL
DPH1
X101
TH1
Indirect Addressing
FL_BANK
EEDATA
CKCON
X110
RAM
EECTRL
PGADR
PDATA
PCON
X111
Bin/
Hex
DF
CF
BF
AF
EF
D7
C7
B7
A7
FF
F7
E7
9F
8F
97
87
v1.2