71M6543F-IGTR/F Maxim Integrated Products, 71M6543F-IGTR/F Datasheet - Page 62
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71M6543F-IGTR/F
Manufacturer Part Number
71M6543F-IGTR/F
Description
PMIC Solutions Precision Energy Meter IC
Manufacturer
Maxim Integrated Products
Type
Metering SoCr
Datasheet
1.71M6543F-DB.pdf
(157 pages)
Specifications of 71M6543F-IGTR/F
Core
8051
Core Architecture
8051
Data Bus Width
8 bit
Data Ram Size
5 KB
Device Million Instructions Per Second
5 MIPS
Interface Type
I2C, ICE, SPI, UART
Maximum Clock Frequency
5 MHz
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Programmable I/os
51
Number Of Timers
2
On-chip Adc
22 bit
Operating Supply Voltage
3 V to 3.6 V
Package / Case
LQFP-100
Processor Series
8051
Program Memory Size
64 KB
Program Memory Type
Flash
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
71M6543F-IGTR/F
Manufacturer:
Maxim Integrated
Quantity:
10 000
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71M6543F/H and 71M6543G/GH Data Sheet
2.5.10.3 LCD Drivers
The LCD drivers are grouped into up to six commons (COM0 – COM5) and up to 56 segment drivers.
The LCD interface is flexible and can drive 7-segment digits, 14-segment digits or enunciator symbols.
A voltage doubler and a contrast DAC generate VLCD from either VBAT or V3P3SYS, depending on the
V3P3SYS voltage. The voltage doubler, while capable of driving into a 500 kΩ load, is able to generate a
maximum LCD voltage that is within 1 V of twice the supply voltage. The doubler and DAC operate from
a trimmed low-power reference.
The configuration of the VLCD generation is controlled by the I/O RAM field LCD_VMODE[1:0] (I/O RAM
0x2401[7:6]). It is decoded into LCD_EXT, LDAC_E, and LCD_BSTE.
LCD_VMODE[1:0] configurations.
62
DIO Data Register
Direction Register:
0 = input, 1 = output
© 2008–2011 Teridian Semiconductor Corporation
51
51
LCD_SEGDIO51[5:0] to LCD_SEGDIO55[5:0]
LCD_SEGDIO51[0] to LCD_SEGDIO55[0]
LCD_SEGDIO51[1] to LCD_SEGDIO55[1]
52
52
(I/O RAM 0x2443[5:0] to 0x2447[5:0])
(I/O RAM 0x2443[0] to 0x2447[0])
(I/O RAM 0x2443[1] to 0x2447[1])
53
53
54
54
55
55
–
–
Table 52
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–
details the
–
–
v1.2
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