PEB20591HV22XP Lantiq, PEB20591HV22XP Datasheet - Page 32

• Manufacturer Part Number: PEB20591HV22XP
• Manufacturer: Lantiq

Specifications of PEB20591HV22XP

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

PRELIMINARY
Data Sheet
Bit
A
S
M
Data Rates
The S/T transmission rate is 192 kbit/s (36 bits user data and 12 bits control and
maintenance). Frames are transmitted with a 2-bit offset in TE/LT-T
S/T Coding
The coding technique used on the S/T interface is a full-bauded AMI code with 100 %
pulse width (refer to
•
Binary Value
Logical ‘0’
Logical ‘1’
•
Figure 15
Description
Activation Bit
A = (0b)
A = (1b)
S-Channel Data Bit
S1 and S2 channel data
Multiframing Bit
M = (1b)
S/T Interface Line Code (without Code Violation)
INFO 2 transmitted
INFO 4 transmitted
Start of new multi-frame
Figure
15).
AMI Code with 100 % Pulse Width
Alternate positive and negative pulses.
There are two exceptions:
• The first binary ’0’ following the first DC balancing bit is
• The F-bit is always at positive level (required code
No line signal (0 V)
of the same polarity as the DC bit,
violations).
24
Interface Description
LT-S direction.
PEB 20590
PEB 20591
2001-03-01